mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-23 23:42:43 +00:00
0224e32cd0
This backports upstream commit 62e13097c46c ("net: phy: broadcom: rehook
BCM54612E specific init")
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
160 lines
5.3 KiB
Diff
160 lines
5.3 KiB
Diff
--- a/drivers/net/phy/broadcom.c
|
|
+++ b/drivers/net/phy/broadcom.c
|
|
@@ -30,6 +30,50 @@ MODULE_DESCRIPTION("Broadcom PHY driver"
|
|
MODULE_AUTHOR("Maciej W. Rozycki");
|
|
MODULE_LICENSE("GPL");
|
|
|
|
+static int bcm54210e_config_init(struct phy_device *phydev)
|
|
+{
|
|
+ int val;
|
|
+
|
|
+ val = bcm54xx_auxctl_read(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC);
|
|
+ val &= ~MII_BCM54XX_AUXCTL_SHDWSEL_MISC_RGMII_SKEW_EN;
|
|
+ val |= MII_BCM54XX_AUXCTL_MISC_WREN;
|
|
+ bcm54xx_auxctl_write(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC, val);
|
|
+
|
|
+ val = bcm_phy_read_shadow(phydev, BCM54810_SHD_CLK_CTL);
|
|
+ val &= ~BCM54810_SHD_CLK_CTL_GTXCLK_EN;
|
|
+ bcm_phy_write_shadow(phydev, BCM54810_SHD_CLK_CTL, val);
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static int bcm54612e_config_init(struct phy_device *phydev)
|
|
+{
|
|
+ /* Clear TX internal delay unless requested. */
|
|
+ if ((phydev->interface != PHY_INTERFACE_MODE_RGMII_ID) &&
|
|
+ (phydev->interface != PHY_INTERFACE_MODE_RGMII_TXID)) {
|
|
+ /* Disable TXD to GTXCLK clock delay (default set) */
|
|
+ /* Bit 9 is the only field in shadow register 00011 */
|
|
+ bcm_phy_write_shadow(phydev, 0x03, 0);
|
|
+ }
|
|
+
|
|
+ /* Clear RX internal delay unless requested. */
|
|
+ if ((phydev->interface != PHY_INTERFACE_MODE_RGMII_ID) &&
|
|
+ (phydev->interface != PHY_INTERFACE_MODE_RGMII_RXID)) {
|
|
+ u16 reg;
|
|
+
|
|
+ reg = bcm54xx_auxctl_read(phydev,
|
|
+ MII_BCM54XX_AUXCTL_SHDWSEL_MISC);
|
|
+ /* Disable RXD to RXC delay (default set) */
|
|
+ reg &= ~MII_BCM54XX_AUXCTL_SHDWSEL_MISC_RGMII_SKEW_EN;
|
|
+ /* Clear shadow selector field */
|
|
+ reg &= ~MII_BCM54XX_AUXCTL_SHDWSEL_MASK;
|
|
+ bcm54xx_auxctl_write(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC,
|
|
+ MII_BCM54XX_AUXCTL_MISC_WREN | reg);
|
|
+ }
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
static int bcm54810_config(struct phy_device *phydev)
|
|
{
|
|
int rc, val;
|
|
@@ -230,7 +274,15 @@ static int bcm54xx_config_init(struct ph
|
|
(phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE))
|
|
bcm54xx_adjust_rxrefclk(phydev);
|
|
|
|
- if (BRCM_PHY_MODEL(phydev) == PHY_ID_BCM54810) {
|
|
+ if (BRCM_PHY_MODEL(phydev) == PHY_ID_BCM54210E) {
|
|
+ err = bcm54210e_config_init(phydev);
|
|
+ if (err)
|
|
+ return err;
|
|
+ } else if (BRCM_PHY_MODEL(phydev) == PHY_ID_BCM54612E) {
|
|
+ err = bcm54612e_config_init(phydev);
|
|
+ if (err)
|
|
+ return err;
|
|
+ } else if (BRCM_PHY_MODEL(phydev) == PHY_ID_BCM54810) {
|
|
err = bcm54810_config(phydev);
|
|
if (err)
|
|
return err;
|
|
@@ -375,41 +427,6 @@ static int bcm5481_config_aneg(struct ph
|
|
return ret;
|
|
}
|
|
|
|
-static int bcm54612e_config_aneg(struct phy_device *phydev)
|
|
-{
|
|
- int ret;
|
|
-
|
|
- /* First, auto-negotiate. */
|
|
- ret = genphy_config_aneg(phydev);
|
|
-
|
|
- /* Clear TX internal delay unless requested. */
|
|
- if ((phydev->interface != PHY_INTERFACE_MODE_RGMII_ID) &&
|
|
- (phydev->interface != PHY_INTERFACE_MODE_RGMII_TXID)) {
|
|
- /* Disable TXD to GTXCLK clock delay (default set) */
|
|
- /* Bit 9 is the only field in shadow register 00011 */
|
|
- bcm_phy_write_shadow(phydev, 0x03, 0);
|
|
- }
|
|
-
|
|
- /* Clear RX internal delay unless requested. */
|
|
- if ((phydev->interface != PHY_INTERFACE_MODE_RGMII_ID) &&
|
|
- (phydev->interface != PHY_INTERFACE_MODE_RGMII_RXID)) {
|
|
- u16 reg;
|
|
-
|
|
- /* Errata: reads require filling in the write selector field */
|
|
- bcm54xx_auxctl_write(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC,
|
|
- MII_BCM54XX_AUXCTL_MISC_RDSEL_MISC);
|
|
- reg = phy_read(phydev, MII_BCM54XX_AUX_CTL);
|
|
- /* Disable RXD to RXC delay (default set) */
|
|
- reg &= ~MII_BCM54XX_AUXCTL_MISC_RXD_RXC_SKEW;
|
|
- /* Clear shadow selector field */
|
|
- reg &= ~MII_BCM54XX_AUXCTL_SHDWSEL_MASK;
|
|
- bcm54xx_auxctl_write(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC,
|
|
- MII_BCM54XX_AUXCTL_MISC_WREN | reg);
|
|
- }
|
|
-
|
|
- return ret;
|
|
-}
|
|
-
|
|
static int brcm_phy_setbits(struct phy_device *phydev, int reg, int set)
|
|
{
|
|
int val;
|
|
@@ -548,6 +565,19 @@ static struct phy_driver broadcom_driver
|
|
.config_intr = bcm_phy_config_intr,
|
|
.driver = { .owner = THIS_MODULE },
|
|
}, {
|
|
+ .phy_id = PHY_ID_BCM54210E,
|
|
+ .phy_id_mask = 0xfffffff0,
|
|
+ .name = "Broadcom BCM54210E",
|
|
+ .features = PHY_GBIT_FEATURES |
|
|
+ SUPPORTED_Pause | SUPPORTED_Asym_Pause,
|
|
+ .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
|
|
+ .config_init = bcm54xx_config_init,
|
|
+ .config_aneg = genphy_config_aneg,
|
|
+ .read_status = genphy_read_status,
|
|
+ .ack_interrupt = bcm_phy_ack_intr,
|
|
+ .config_intr = bcm_phy_config_intr,
|
|
+ .driver = { .owner = THIS_MODULE },
|
|
+}, {
|
|
.phy_id = PHY_ID_BCM5461,
|
|
.phy_id_mask = 0xfffffff0,
|
|
.name = "Broadcom BCM5461",
|
|
@@ -568,7 +598,7 @@ static struct phy_driver broadcom_driver
|
|
SUPPORTED_Pause | SUPPORTED_Asym_Pause,
|
|
.flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
|
|
.config_init = bcm54xx_config_init,
|
|
- .config_aneg = bcm54612e_config_aneg,
|
|
+ .config_aneg = genphy_config_aneg,
|
|
.read_status = genphy_read_status,
|
|
.ack_interrupt = bcm_phy_ack_intr,
|
|
.config_intr = bcm_phy_config_intr,
|
|
@@ -710,6 +740,7 @@ module_phy_driver(broadcom_drivers);
|
|
static struct mdio_device_id __maybe_unused broadcom_tbl[] = {
|
|
{ PHY_ID_BCM5411, 0xfffffff0 },
|
|
{ PHY_ID_BCM5421, 0xfffffff0 },
|
|
+ { PHY_ID_BCM54210E, 0xfffffff0 },
|
|
{ PHY_ID_BCM5461, 0xfffffff0 },
|
|
{ PHY_ID_BCM54612E, 0xfffffff0 },
|
|
{ PHY_ID_BCM54616S, 0xfffffff0 },
|
|
--- a/include/linux/brcmphy.h
|
|
+++ b/include/linux/brcmphy.h
|
|
@@ -17,6 +17,7 @@
|
|
#define PHY_ID_BCM5482 0x0143bcb0
|
|
#define PHY_ID_BCM5411 0x00206070
|
|
#define PHY_ID_BCM5421 0x002060e0
|
|
+#define PHY_ID_BCM54210E 0x600d84a0
|
|
#define PHY_ID_BCM5464 0x002060b0
|
|
#define PHY_ID_BCM5461 0x002060c0
|
|
#define PHY_ID_BCM54612E 0x03625e60
|