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029093a302
This target has full device tree support, thus reducing the number of patches needed for bcm63xx, in which there's a patch for every board. The intention is to start with a minimal amount of downstream patches and start upstreaming all of them. Current status: - Enabling EHCI/OHCI on BCM6358 causes a kernel panic. - BCM63268 lacks Timer Clocks/Reset support. - No PCI/PCIe drivers. - No ethernet drivers. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Acked-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
72 lines
2.2 KiB
C
72 lines
2.2 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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#ifndef __DT_BINDINGS_INTERRUPT_CONTROLLER_BCM6362_H
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#define __DT_BINDINGS_INTERRUPT_CONTROLLER_BCM6362_H
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#define BCM6362_IRQ_TIMER 0
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#define BCM6362_IRQ_RING_OSC 1
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#define BCM6362_IRQ_LSSPI 2
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#define BCM6362_IRQ_UART0 3
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#define BCM6362_IRQ_UART1 4
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#define BCM6362_IRQ_HSSPI 5
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#define BCM6362_IRQ_WLAN_GPIO 6
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#define BCM6362_IRQ_WLAN 7
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#define BCM6362_IRQ_IPSEC 8
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#define BCM6362_IRQ_OHCI 9
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#define BCM6362_IRQ_EHCI 10
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#define BCM6362_IRQ_USBS 11
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#define BCM6362_IRQ_NAND 12
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#define BCM6362_IRQ_PCM 13
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#define BCM6362_IRQ_EPHY 14
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#define BCM6362_IRQ_DF 15
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#define BCM6362_IRQ_EPHY_EN0 16
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#define BCM6362_IRQ_EPHY_EN1 17
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#define BCM6362_IRQ_EPHY_EN2 18
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#define BCM6362_IRQ_EPHY_EN3 19
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#define BCM6362_IRQ_USB_CTL_RX_DMA 20
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#define BCM6362_IRQ_USB_CTL_TX_DMA 21
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#define BCM6362_IRQ_USB_BULK_RX_DMA 22
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#define BCM6362_IRQ_USB_BULK_TX_DMA 23
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#define BCM6362_IRQ_USB_ISO_RX_DMA 24
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#define BCM6362_IRQ_USB_ISO_TX_DMA 25
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#define BCM6362_IRQ_IPSEC_DMA0 26
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#define BCM6362_IRQ_IPSEC_DMA1 27
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#define BCM6362_IRQ_XDSL 28
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#define BCM6362_IRQ_FAP 29
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#define BCM6362_IRQ_PCIE_RC 30
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#define BCM6362_IRQ_PCIE_EP 31
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#define BCM6362_IRQ_ENETSW_RX_DMA0 32
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#define BCM6362_IRQ_ENETSW_RX_DMA1 33
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#define BCM6362_IRQ_ENETSW_RX_DMA2 34
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#define BCM6362_IRQ_ENETSW_RX_DMA3 35
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#define BCM6362_IRQ_PCM_DMA0 36
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#define BCM6362_IRQ_PCM_DMA1 37
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#define BCM6362_IRQ_DECT0 38
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#define BCM6362_IRQ_DECT1 39
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#define BCM6362_IRQ_EXT0 40
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#define BCM6362_IRQ_EXT1 41
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#define BCM6362_IRQ_EXT2 42
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#define BCM6362_IRQ_EXT3 43
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#define BCM6362_IRQ_ATM_DMA0 44
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#define BCM6362_IRQ_ATM_DMA1 45
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#define BCM6362_IRQ_ATM_DMA2 46
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#define BCM6362_IRQ_ATM_DMA3 47
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#define BCM6362_IRQ_ATM_DMA4 48
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#define BCM6362_IRQ_ATM_DMA5 49
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#define BCM6362_IRQ_ATM_DMA6 50
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#define BCM6362_IRQ_ATM_DMA7 51
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#define BCM6362_IRQ_ATM_DMA8 52
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#define BCM6362_IRQ_ATM_DMA9 53
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#define BCM6362_IRQ_ATM_DMA10 54
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#define BCM6362_IRQ_ATM_DMA11 55
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#define BCM6362_IRQ_ATM_DMA12 56
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#define BCM6362_IRQ_ATM_DMA13 57
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#define BCM6362_IRQ_ATM_DMA14 58
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#define BCM6362_IRQ_ATM_DMA15 59
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#define BCM6362_IRQ_ATM_DMA16 60
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#define BCM6362_IRQ_ATM_DMA17 61
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#define BCM6362_IRQ_ATM_DMA18 62
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#define BCM6362_IRQ_ATM_DMA19 63
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#endif /* __DT_BINDINGS_INTERRUPT_CONTROLLER_BCM6362_H */
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