mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-28 01:28:59 +00:00
2e715fb4fc
Add support for BCM2712 (Raspberry Pi 5).
3bb5880ab3
Patches were generated from the diff between linux kernel branch linux-6.1.y
and rpi-6.1.y from raspberry pi kernel source:
- git format-patch linux-6.1.y...rpi-6.1.y
Build system: x86_64
Build-tested: bcm2708, bcm2709, bcm2710, bcm2711
Run-tested: bcm2710/RPi3B, bcm2711/RPi4B
Signed-off-by: Marty Jones <mj8263788@gmail.com>
[Remove applied and reverted patches, squash patches and config commits]
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
51 lines
1.9 KiB
Diff
51 lines
1.9 KiB
Diff
From 712bccec241e84e28ccb725fae87d3255d039f42 Mon Sep 17 00:00:00 2001
|
|
From: Dom Cobley <popcornmix@gmail.com>
|
|
Date: Thu, 22 Jun 2023 14:06:40 +0100
|
|
Subject: [PATCH] drm/vc4: hvs: Remove ABORT_ON_EMPTY flag
|
|
|
|
ABORT_ON_EMPTY chooses whether the HVS abandons the current frame
|
|
when it experiences an underflow, or attempts to continue.
|
|
|
|
In theory the frame should be black from the point of underflow,
|
|
compared to a shift of sebsequent pixels to the left.
|
|
|
|
Unfortunately it seems to put the HVS is a bad state where it is not
|
|
possible to recover simply. This typically requires a reboot
|
|
following the 'flip done timed out message'.
|
|
|
|
Discussion with Broadcom has suggested we don't use this flag.
|
|
All their testing is done with it disabled.
|
|
|
|
Additionally setting BLANK_INSERT_EN causes the HDMI to output
|
|
blank pixels on an underflow which avoids it losing sync.
|
|
|
|
After this change a 'flip done timed out' due to sdram bandwidth
|
|
starvation or too low a clock is recoverable once the situation improves.
|
|
|
|
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
|
|
---
|
|
drivers/gpu/drm/vc4/vc4_hdmi.c | 1 +
|
|
drivers/gpu/drm/vc4/vc4_regs.h | 1 +
|
|
2 files changed, 2 insertions(+)
|
|
|
|
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
|
|
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
|
|
@@ -1866,6 +1866,7 @@ static void vc4_hdmi_encoder_post_crtc_e
|
|
VC4_HD_VID_CTL_CLRRGB |
|
|
VC4_HD_VID_CTL_UNDERFLOW_ENABLE |
|
|
VC4_HD_VID_CTL_FRAME_COUNTER_RESET |
|
|
+ VC4_HD_VID_CTL_BLANK_INSERT_EN |
|
|
(vsync_pos ? 0 : VC4_HD_VID_CTL_VSYNC_LOW) |
|
|
(hsync_pos ? 0 : VC4_HD_VID_CTL_HSYNC_LOW));
|
|
|
|
--- a/drivers/gpu/drm/vc4/vc4_regs.h
|
|
+++ b/drivers/gpu/drm/vc4/vc4_regs.h
|
|
@@ -799,6 +799,7 @@ enum {
|
|
# define VC4_HD_VID_CTL_CLRSYNC BIT(24)
|
|
# define VC4_HD_VID_CTL_CLRRGB BIT(23)
|
|
# define VC4_HD_VID_CTL_BLANKPIX BIT(18)
|
|
+# define VC4_HD_VID_CTL_BLANK_INSERT_EN BIT(16)
|
|
|
|
# define VC4_HD_CSC_CTL_ORDER_MASK VC4_MASK(7, 5)
|
|
# define VC4_HD_CSC_CTL_ORDER_SHIFT 5
|