mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-28 09:39:00 +00:00
4070e2a64c
This target adds support for the StarFive JH7100 and JH7110 SoCs, based on 6.1, as well as a couple boards equipped with these. Specifications: SoCs: JH7100: - StarFive JH7100 dual-core RISC-V (U74, RC64GC) - additional monitoring (S7) and control (E24) cores - 2Mb L2 cache JH7110: - StarFive JH7110 quad-core RISC-V (U74, RV64GC) - additional monitoring (S7) and control (E24) cores - 2Mb L2 cache Boards: VisionFive1: - JH7100 @ 1GHz - Memory: 8Gb LPDDR4 - 4x USB3.0 - 1x GBit ethernet - AMPak 6236 wifi / bluetooth - audio - powered via USB-C VisionFive2: - JH7110 @ 1.5GHz - Memory: 2/4/8Gb DDR4 - 2x Gbit ethernet - 2x USB3.0 / 2x USB2.0 - eMMC / SDIO - various multimedia input/outputs (MIPI CSI, HDMI, audio) - M.2 key M slot - PoE support - powered via USB-C Installation: Standard SD-card installation via dd-ing the generated image to an SD-card of at least 256Mb. Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
44 lines
1.4 KiB
Diff
44 lines
1.4 KiB
Diff
From cbb348ddbc68fe4fc8ac80bed11c298149e7893f Mon Sep 17 00:00:00 2001
|
|
From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
|
|
Date: Tue, 18 Oct 2022 00:05:42 +0300
|
|
Subject: [PATCH 024/122] riscv: dts: starfive: Add StarFive VisionFive V1
|
|
device tree
|
|
|
|
Add initial device tree for the StarFive VisionFive V1 SBC, which
|
|
is similar with the already supported BeagleV Starlight Beta board,
|
|
both being based on the StarFive JH7100 SoC.
|
|
|
|
Link: https://github.com/starfive-tech/VisionFive
|
|
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
|
|
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
|
|
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
|
|
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
|
|
---
|
|
.../jh7100-starfive-visionfive-v1.dts | 20 +++++++++++++++++++
|
|
1 file changed, 20 insertions(+)
|
|
create mode 100644 arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dts
|
|
|
|
--- /dev/null
|
|
+++ b/arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dts
|
|
@@ -0,0 +1,20 @@
|
|
+// SPDX-License-Identifier: GPL-2.0 OR MIT
|
|
+/*
|
|
+ * Copyright (C) 2021 StarFive Technology Co., Ltd.
|
|
+ * Copyright (C) 2021 Emil Renner Berthing <kernel@esmil.dk>
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+#include "jh7100-common.dtsi"
|
|
+#include <dt-bindings/gpio/gpio.h>
|
|
+
|
|
+/ {
|
|
+ model = "StarFive VisionFive V1";
|
|
+ compatible = "starfive,visionfive-v1", "starfive,jh7100";
|
|
+
|
|
+ gpio-restart {
|
|
+ compatible = "gpio-restart";
|
|
+ gpios = <&gpio 63 GPIO_ACTIVE_HIGH>;
|
|
+ priority = <224>;
|
|
+ };
|
|
+};
|