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2c0cec1eb0
The backports introduced in commit d40756563c ("kernel: backport
phylink changes from mainline Linux") broke the mv88e6xxx DSA driver.
A backport to fix this was added to the kirkwood target, but as it is
used in multiple targets, and there's a kmod package for it, the fix
should be in generic backports.
This fixes the switch on the WatchGuard Firebox M300 when running the
6.1 testing kernel.
There is no need to backport the fix for the 6.6 kernel, as it was
included in 6.6.5.
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
28 lines
1.1 KiB
Diff
28 lines
1.1 KiB
Diff
From: Tobias Waldekranz <tobias@waldekranz.com>
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Subject: [RFC net-next 7/7] net: dsa: mv88e6xxx: Request assisted learning on CPU port
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Date: Sat, 16 Jan 2021 02:25:15 +0100
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Archived-At: <https://lore.kernel.org/netdev/20210116012515.3152-8-tobias@waldekranz.com/>
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While the hardware is capable of performing learning on the CPU port,
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it requires alot of additions to the bridge's forwarding path in order
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to handle multi-destination traffic correctly.
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Until that is in place, opt for the next best thing and let DSA sync
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the relevant addresses down to the hardware FDB.
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Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com>
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---
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drivers/net/dsa/mv88e6xxx/chip.c | 1 +
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1 file changed, 1 insertion(+)
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--- a/drivers/net/dsa/mv88e6xxx/chip.c
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+++ b/drivers/net/dsa/mv88e6xxx/chip.c
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@@ -7037,6 +7037,7 @@ static int mv88e6xxx_register_switch(str
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ds->ops = &mv88e6xxx_switch_ops;
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ds->ageing_time_min = chip->info->age_time_coeff;
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ds->ageing_time_max = chip->info->age_time_coeff * U8_MAX;
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+ ds->assisted_learning_on_cpu_port = true;
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/* Some chips support up to 32, but that requires enabling the
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* 5-bit port mode, which we do not support. 640k^W16 ought to
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