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8f4dfadd5a
Use diag.sh version used for other targets supporting different leds for the different boot states. The existing led sequences should be the same as before. Signed-off-by: Mathias Kresin <dev@kresin.me>
148 lines
2.4 KiB
Plaintext
148 lines
2.4 KiB
Plaintext
/dts-v1/;
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#include "mt7621.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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compatible = "netgear,wndr3700-v5", "mediatek,mt7621-soc";
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model = "Netgear WNDR3700v5";
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aliases {
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led-boot = &led_power;
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led-failsafe = &led_power;
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led-running = &led_power;
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led-upgrade = &led_power;
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x8000000>;
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};
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chosen {
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bootargs = "console=ttyS0,57600 maxcpus=2";
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};
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gpio-leds {
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compatible = "gpio-leds";
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wps {
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label = "wndr3700v5:green:wps";
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gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
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};
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led_power: power {
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label = "wndr3700v5:green:power";
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gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
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};
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};
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gpio-keys-polled {
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compatible = "gpio-keys-polled";
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poll-interval = <20>;
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wps {
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label = "wndr3700v5:wps";
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gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
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linux,code = <KEY_WPS_BUTTON>;
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};
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wifi {
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label = "wndr3700v5:wifi";
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gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
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linux,code = <KEY_RFKILL>;
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};
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reset {
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label = "wndr3700v5:reset";
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gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
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linux,code = <KEY_RESTART>;
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};
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};
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gpio_export {
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compatible = "gpio-export";
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#size-cells = <0>;
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usbpower {
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gpio-export,name = "usbpower";
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gpio-export,output = <1>;
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gpios = <&gpio0 10 GPIO_ACTIVE_HIGH>;
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};
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};
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};
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&spi0 {
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status = "okay";
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mx25l12805d@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <10000000>;
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m25p,chunked-io = <32>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x30000>;
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read-only;
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};
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partition@30000 {
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label = "u-boot-env";
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reg = <0x30000 0x10000>;
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read-only;
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};
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factory: partition@f30000 {
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label = "factory";
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reg = <0xf30000 0x10000>;
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read-only;
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};
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partition@50000 {
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label = "firmware";
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reg = <0x50000 0xee0000>;
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};
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};
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};
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};
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&pcie {
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status = "okay";
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};
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&pcie0 {
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mt76@0,0 {
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reg = <0x0000 0 0 0 0>;
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mediatek,mtd-eeprom = <&factory 0x8000>;
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ieee80211-freq-limit = <5000000 6000000>;
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};
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};
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&pcie1 {
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mt76@0,0 {
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reg = <0x0000 0 0 0 0>;
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mediatek,mtd-eeprom = <&factory 0x0000>;
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};
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};
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ðernet {
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mtd-mac-address = <&factory 0x0000000c>;
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};
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&pinctrl {
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state_default: pinctrl0 {
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gpio {
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ralink,group = "rgmii2", "mdio", "wdt";
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ralink,function = "gpio";
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};
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};
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};
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