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https://github.com/openwrt/openwrt.git
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e2ceb8dd93
These are all backports and/or on their way upstream. Signed-off-by: John Crispin <john@phrozen.org>
24 lines
1.1 KiB
Diff
24 lines
1.1 KiB
Diff
diff -urN a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
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--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c 2020-03-31 16:05:24.398403054 +0800
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+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c 2020-03-31 16:05:39.142008780 +0800
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@@ -1284,7 +1284,7 @@
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skb->protocol = eth_type_trans(skb, netdev);
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if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX &&
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- RX_DMA_VID(trxd.rxd3))
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+ (trxd.rxd2 & RX_DMA_VTAG))
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__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
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RX_DMA_VID(trxd.rxd3));
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skb_record_rx_queue(skb, 0);
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diff -urN a/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
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--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h 2020-03-31 16:05:29.726260583 +0800
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+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h 2020-03-31 16:05:43.493892389 +0800
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@@ -293,6 +293,7 @@
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#define RX_DMA_LSO BIT(30)
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#define RX_DMA_PLEN0(_x) (((_x) & 0x3fff) << 16)
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#define RX_DMA_GET_PLEN0(_x) (((_x) >> 16) & 0x3fff)
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+#define RX_DMA_VTAG BIT(15)
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/* QDMA descriptor rxd3 */
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#define RX_DMA_VID(_x) ((_x) & 0xfff)
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