mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-24 07:46:48 +00:00
b756ea2a90
Upstream pinctrl driver in drivers/staging uses groups/function/ralink,num-gpios instead of ralink,group/ralink,function/ralink,nr-gpio Replace these properties in dts as well as the pinctrl driver in patches-4.14. This commit is created using: sed -i 's/ralink,group/groups/g' sed -i 's/ralink,function/function/g' sed -i 's/ralink,nr-gpio/ralink,num-gpios/g' Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
97 lines
1.7 KiB
Plaintext
97 lines
1.7 KiB
Plaintext
/dts-v1/;
|
|
|
|
#include "mt7628an_tplink_8m.dtsi"
|
|
|
|
/ {
|
|
compatible = "tplink,archer-c50-v3", "mediatek,mt7628an-soc";
|
|
model = "TP-Link Archer C50 v3";
|
|
|
|
aliases {
|
|
led-boot = &led_power;
|
|
led-failsafe = &led_power;
|
|
led-running = &led_power;
|
|
led-upgrade = &led_power;
|
|
};
|
|
|
|
keys {
|
|
compatible = "gpio-keys";
|
|
|
|
reset {
|
|
label = "reset";
|
|
gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
|
|
linux,code = <KEY_RESTART>;
|
|
};
|
|
|
|
rfkill {
|
|
label = "rfkill";
|
|
gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
|
|
linux,code = <KEY_RFKILL>;
|
|
};
|
|
};
|
|
|
|
leds {
|
|
compatible = "gpio-leds";
|
|
|
|
lan {
|
|
label = "archer-c50-v3:green:lan";
|
|
gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
led_power: power {
|
|
label = "archer-c50-v3:green:power";
|
|
gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
wan {
|
|
label = "archer-c50-v3:green:wan";
|
|
gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
wan_orange {
|
|
label = "archer-c50-v3:orange:wan";
|
|
gpios = <&gpio 40 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
wlan {
|
|
label = "archer-c50-v3:green:wlan2g";
|
|
gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
wlan5 {
|
|
label = "archer-c50-v3:green:wlan5g";
|
|
gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
wps {
|
|
label = "archer-c50-v3:green:wps";
|
|
gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&state_default {
|
|
gpio {
|
|
groups = "i2c", "gpio", "p0led_an", "p1led_an", "p2led_an",
|
|
"p3led_an", "p4led_an", "wdt", "wled_an";
|
|
function = "gpio";
|
|
};
|
|
};
|
|
|
|
&esw {
|
|
mediatek,portmap = <0x3e>;
|
|
};
|
|
|
|
&pcie {
|
|
status = "okay";
|
|
};
|
|
|
|
&pcie0 {
|
|
mt76@0,0 {
|
|
reg = <0x0000 0 0 0 0>;
|
|
mediatek,mtd-eeprom = <&factory 0x28000>;
|
|
ieee80211-freq-limit = <5000000 6000000>;
|
|
mtd-mac-address = <&factory 0xf100>;
|
|
mtd-mac-address-increment = <(-1)>;
|
|
};
|
|
};
|