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https://github.com/openwrt/openwrt.git
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17e37536a2
SVN-Revision: 30764
64 lines
2.2 KiB
Diff
64 lines
2.2 KiB
Diff
--- a/drivers/net/wireless/ath/ath9k/debug.c
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+++ b/drivers/net/wireless/ath/ath9k/debug.c
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@@ -944,27 +944,6 @@ static ssize_t read_file_recv(struct fil
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PHY_ERR("HT-RATE ERR", ATH9K_PHYERR_HT_RATE_ILLEGAL);
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len += snprintf(buf + len, size - len,
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- "%22s : %10d\n", "RSSI-CTL0",
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- sc->debug.stats.rxstats.rs_rssi_ctl0);
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- len += snprintf(buf + len, size - len,
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- "%22s : %10d\n", "RSSI-CTL1",
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- sc->debug.stats.rxstats.rs_rssi_ctl1);
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- len += snprintf(buf + len, size - len,
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- "%22s : %10d\n", "RSSI-CTL2",
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- sc->debug.stats.rxstats.rs_rssi_ctl2);
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- len += snprintf(buf + len, size - len,
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- "%22s : %10d\n", "RSSI-EXT0",
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- sc->debug.stats.rxstats.rs_rssi_ext0);
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- len += snprintf(buf + len, size - len,
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- "%22s : %10d\n", "RSSI-EXT1",
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- sc->debug.stats.rxstats.rs_rssi_ext1);
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- len += snprintf(buf + len, size - len,
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- "%22s : %10d\n", "RSSI-EXT2",
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- sc->debug.stats.rxstats.rs_rssi_ext2);
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- len += snprintf(buf + len, size - len,
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- "%22s : %10d\n", "Rx Antenna",
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- sc->debug.stats.rxstats.rs_antenna);
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- len += snprintf(buf + len, size - len,
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"%22s : %10u\n", "RX-Pkts-All",
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sc->debug.stats.rxstats.rx_pkts_all);
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len += snprintf(buf + len, size - len,
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@@ -1011,16 +990,6 @@ void ath_debug_stat_rx(struct ath_softc
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RX_PHY_ERR_INC(rs->rs_phyerr);
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}
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- sc->debug.stats.rxstats.rs_rssi_ctl0 = rs->rs_rssi_ctl0;
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- sc->debug.stats.rxstats.rs_rssi_ctl1 = rs->rs_rssi_ctl1;
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- sc->debug.stats.rxstats.rs_rssi_ctl2 = rs->rs_rssi_ctl2;
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-
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- sc->debug.stats.rxstats.rs_rssi_ext0 = rs->rs_rssi_ext0;
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- sc->debug.stats.rxstats.rs_rssi_ext1 = rs->rs_rssi_ext1;
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- sc->debug.stats.rxstats.rs_rssi_ext2 = rs->rs_rssi_ext2;
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-
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- sc->debug.stats.rxstats.rs_antenna = rs->rs_antenna;
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-
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#ifdef CONFIG_ATH9K_MAC_DEBUG
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spin_lock(&sc->debug.samp_lock);
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RX_SAMP_DBG(jiffies) = jiffies;
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--- a/drivers/net/wireless/ath/ath9k/debug.h
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+++ b/drivers/net/wireless/ath/ath9k/debug.h
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@@ -165,13 +165,6 @@ struct ath_rx_stats {
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u32 post_delim_crc_err;
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u32 decrypt_busy_err;
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u32 phy_err_stats[ATH9K_PHYERR_MAX];
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- int8_t rs_rssi_ctl0;
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- int8_t rs_rssi_ctl1;
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- int8_t rs_rssi_ctl2;
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- int8_t rs_rssi_ext0;
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- int8_t rs_rssi_ext1;
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- int8_t rs_rssi_ext2;
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- u8 rs_antenna;
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};
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enum ath_reset_type {
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