mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-19 13:48:06 +00:00
35 lines
1.3 KiB
Diff
35 lines
1.3 KiB
Diff
--- a/drivers/irqchip/Kconfig
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+++ b/drivers/irqchip/Kconfig
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@@ -27,6 +27,11 @@ config ARM_GIC_V3_ITS
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bool
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select PCI_MSI_IRQ_DOMAIN
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+config PLXTECH_RPS
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+ def_bool y if ARHC_OXNAS
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+ depends on ARCH_OXNAS
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+ select IRQ_DOMAIN
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+
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config ARM_NVIC
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bool
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select IRQ_DOMAIN
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--- a/drivers/irqchip/Makefile
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+++ b/drivers/irqchip/Makefile
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@@ -34,6 +34,7 @@ obj-$(CONFIG_IRQ_MIPS_CPU) += irq-mips-
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obj-$(CONFIG_SIRF_IRQ) += irq-sirfsoc.o
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obj-$(CONFIG_RENESAS_INTC_IRQPIN) += irq-renesas-intc-irqpin.o
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obj-$(CONFIG_RENESAS_IRQC) += irq-renesas-irqc.o
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+obj-$(CONFIG_PLXTECH_RPS) += irq-rps.o
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obj-$(CONFIG_VERSATILE_FPGA_IRQ) += irq-versatile-fpga.o
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obj-$(CONFIG_ARCH_NSPIRE) += irq-zevio.o
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obj-$(CONFIG_ARCH_VT8500) += irq-vt8500.o
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--- a/drivers/irqchip/irq-gic.c
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+++ b/drivers/irqchip/irq-gic.c
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@@ -1253,6 +1253,7 @@ IRQCHIP_DECLARE(arm1176jzf_dc_gic, "arm,
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IRQCHIP_DECLARE(cortex_a15_gic, "arm,cortex-a15-gic", gic_of_init);
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IRQCHIP_DECLARE(cortex_a9_gic, "arm,cortex-a9-gic", gic_of_init);
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IRQCHIP_DECLARE(cortex_a7_gic, "arm,cortex-a7-gic", gic_of_init);
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+IRQCHIP_DECLARE(arm11_mpcore_gic, "arm,arm11mp-gic", gic_of_init);
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IRQCHIP_DECLARE(msm_8660_qgic, "qcom,msm-8660-qgic", gic_of_init);
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IRQCHIP_DECLARE(msm_qgic2, "qcom,msm-qgic2", gic_of_init);
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IRQCHIP_DECLARE(pl390, "arm,pl390", gic_of_init);
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