openwrt/target/linux/ath79/patches-5.10/0052-mtd-spi-nor-use-4-bit-locking-for-MX25L12805D.patch
Nick Hainke 83b5fbddf2 kernel: 5.10: add patches to fix macronix flash
mtd: spi-nor: locking support for MX25L6405D

Macronix MX25L6405D supports locking with four block-protection bits.
Currently, the driver only sets three bits.  If the bootloader does not
sustain the flash chip in an unlocked state, the flash might be
non-writeable. Add the corresponding flag to enable locking support with
four bits in the status register.

mtd: spi-nor: disable 16-bit-sr for macronix

Macronix flash chips seem to consist of only one status register.
These chips will not work with the "16-bit Write Status (01h) Command".
Disable SNOR_F_HAS_16BIT_SR for all Macronix chips.

Refreshed:
- 0052-mtd-spi-nor-use-4-bit-locking-for-MX25L12805D.patch

Fixes: 15aa53d7ee ("ath79: switch to Kernel 5.10")

Signed-off-by: Nick Hainke <vincent@systemli.org>
2021-12-29 22:55:16 +01:00

34 lines
1.4 KiB
Diff

From a449cd03db4d0e1d292b3734f7676634cfd94f53 Mon Sep 17 00:00:00 2001
From: David Bauer <mail@david-bauer.net>
Date: Sun, 25 Oct 2020 01:14:22 +0200
Subject: [PATCH] mtd: spi-nor: use 4 bit locking for MX25L12805D
Macronix MX25L12805D supports locking with 4 block
protection bits in its status register. Add the corresponding
flag in order to clear these bits when unloking the flash.
Otherwise, the flash might not be writable depending on the state
left by the bootloader.
Tested-on: Ubiquiti UniFi AC Lite (ath79)
Fixes commit 62593cf40b23 ("mtd: spi-nor: refactor block protection functions")
Signed-off-by: David Bauer <mail@david-bauer.net>
---
drivers/mtd/spi-nor/macronix.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
--- a/drivers/mtd/spi-nor/macronix.c
+++ b/drivers/mtd/spi-nor/macronix.c
@@ -51,7 +51,8 @@ static const struct flash_info macronix_
{ "mx25u4035", INFO(0xc22533, 0, 64 * 1024, 8, SECT_4K) },
{ "mx25u8035", INFO(0xc22534, 0, 64 * 1024, 16, SECT_4K) },
{ "mx25u6435f", INFO(0xc22537, 0, 64 * 1024, 128, SECT_4K) },
- { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, SECT_4K) },
+ { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, SECT_4K |
+ SPI_NOR_HAS_LOCK | SPI_NOR_4BIT_BP) },
{ "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) },
{ "mx25r1635f", INFO(0xc22815, 0, 64 * 1024, 32,
SECT_4K | SPI_NOR_DUAL_READ |