mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-26 00:41:17 +00:00
1f153558a3
- fw_passed_dtb and others were replaced to get_fdt() function[1] - __appended_dtb defined by asm/bootinfo.h[2] [1]: https://www.spinics.net/lists/linux-mips/msg03332.html [2]: https://www.spinics.net/lists/linux-mips/msg03332.html Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
103 lines
2.1 KiB
C
103 lines
2.1 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
|
|
/*
|
|
* Setup for the Realtek RTL838X SoC:
|
|
* Memory, Timer and Serial
|
|
*
|
|
* Copyright (C) 2020 B. Koblitz
|
|
* based on the original BSP by
|
|
* Copyright (C) 2006-2012 Tony Wu (tonywu@realtek.com)
|
|
*
|
|
*/
|
|
|
|
#include <linux/console.h>
|
|
#include <linux/init.h>
|
|
#include <linux/clkdev.h>
|
|
#include <linux/clk-provider.h>
|
|
#include <linux/clk.h>
|
|
#include <linux/delay.h>
|
|
#include <linux/of_fdt.h>
|
|
#include <linux/irqchip.h>
|
|
|
|
#include <asm/addrspace.h>
|
|
#include <asm/io.h>
|
|
#include <asm/bootinfo.h>
|
|
#include <asm/time.h>
|
|
#include <asm/prom.h>
|
|
#include <asm/smp-ops.h>
|
|
|
|
#include "mach-rtl83xx.h"
|
|
|
|
extern struct rtl83xx_soc_info soc_info;
|
|
|
|
void __init plat_mem_setup(void)
|
|
{
|
|
void *dtb;
|
|
|
|
set_io_port_base(KSEG1);
|
|
|
|
dtb = get_fdt();
|
|
if (!dtb)
|
|
panic("no dtb found");
|
|
|
|
/*
|
|
* Load the devicetree. This causes the chosen node to be
|
|
* parsed resulting in our memory appearing
|
|
*/
|
|
__dt_setup_arch(dtb);
|
|
}
|
|
|
|
void plat_time_init_fallback(void)
|
|
{
|
|
struct device_node *np;
|
|
u32 freq = 500000000;
|
|
|
|
np = of_find_node_by_name(NULL, "cpus");
|
|
if (!np) {
|
|
pr_err("Missing 'cpus' DT node, using default frequency.");
|
|
} else {
|
|
if (of_property_read_u32(np, "frequency", &freq) < 0)
|
|
pr_err("No 'frequency' property in DT, using default.");
|
|
else
|
|
pr_info("CPU frequency from device tree: %dMHz", freq / 1000000);
|
|
of_node_put(np);
|
|
}
|
|
mips_hpt_frequency = freq / 2;
|
|
}
|
|
|
|
void __init plat_time_init(void)
|
|
{
|
|
/*
|
|
* Initialization routine resembles generic MIPS plat_time_init() with
|
|
* lazy error handling. The final fallback is only needed until we have
|
|
* converted all device trees to new clock syntax.
|
|
*/
|
|
struct device_node *np;
|
|
struct clk *clk;
|
|
|
|
of_clk_init(NULL);
|
|
|
|
mips_hpt_frequency = 0;
|
|
np = of_get_cpu_node(0, NULL);
|
|
if (!np) {
|
|
pr_err("Failed to get CPU node\n");
|
|
} else {
|
|
clk = of_clk_get(np, 0);
|
|
if (IS_ERR(clk)) {
|
|
pr_err("Failed to get CPU clock: %ld\n", PTR_ERR(clk));
|
|
} else {
|
|
mips_hpt_frequency = clk_get_rate(clk) / 2;
|
|
clk_put(clk);
|
|
}
|
|
}
|
|
|
|
if (!mips_hpt_frequency)
|
|
plat_time_init_fallback();
|
|
|
|
timer_probe();
|
|
}
|
|
|
|
void __init arch_init_irq(void)
|
|
{
|
|
irqchip_init();
|
|
}
|