mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-27 01:11:14 +00:00
343f4f3c54
Use realtek,extif property instead of realtek,extif0 and realtek,extif1 by extending it with the cpu_port parameter. The extif number is automatically calculated based on cpu_port. Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com> Link: https://github.com/openwrt/openwrt/pull/15749 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
183 lines
3.1 KiB
Plaintext
183 lines
3.1 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
|
|
|
#include "ar7242.dtsi"
|
|
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
#include <dt-bindings/input/input.h>
|
|
#include <dt-bindings/leds/common.h>
|
|
|
|
/ {
|
|
compatible = "tplink,tl-wr2543-v1", "qca,ar7242";
|
|
model = "TP-Link TL-WR2543N/ND";
|
|
|
|
aliases {
|
|
led-boot = &led_wps;
|
|
led-failsafe = &led_wps;
|
|
led-running = &led_wps;
|
|
led-upgrade = &led_wps;
|
|
label-mac-device = ð0;
|
|
};
|
|
|
|
chosen {
|
|
bootargs = "console=ttyS0,115200n8";
|
|
};
|
|
|
|
keys {
|
|
compatible = "gpio-keys";
|
|
|
|
reset {
|
|
label = "reset";
|
|
linux,code = <KEY_RESTART>;
|
|
gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
|
|
debounce-interval = <60>;
|
|
};
|
|
|
|
wps {
|
|
label = "wps";
|
|
linux,code = <KEY_WPS_BUTTON>;
|
|
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
|
|
debounce-interval = <60>;
|
|
};
|
|
};
|
|
|
|
leds {
|
|
compatible = "gpio-leds";
|
|
|
|
led_wps: wps {
|
|
function = LED_FUNCTION_WPS;
|
|
color = <LED_COLOR_ID_GREEN>;
|
|
gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
usb {
|
|
function = LED_FUNCTION_USB;
|
|
color = <LED_COLOR_ID_GREEN>;
|
|
gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
|
|
trigger-sources = <&hub_port>;
|
|
linux,default-trigger = "usbport";
|
|
};
|
|
};
|
|
|
|
ath9k-leds {
|
|
compatible = "gpio-leds";
|
|
|
|
wlan2g {
|
|
label = "green:wlan2g";
|
|
gpios = <&ath9k 0 GPIO_ACTIVE_LOW>;
|
|
linux,default-trigger = "phy0tpt";
|
|
};
|
|
|
|
wlan5g {
|
|
label = "green:wlan5g";
|
|
gpios = <&ath9k 1 GPIO_ACTIVE_LOW>;
|
|
linux,default-trigger = "phy0tpt";
|
|
};
|
|
};
|
|
|
|
rtl8367 {
|
|
compatible = "realtek,rtl8367";
|
|
gpio-sda = <&gpio 1 GPIO_ACTIVE_HIGH>;
|
|
gpio-sck = <&gpio 6 GPIO_ACTIVE_HIGH>;
|
|
realtek,extif = <9 1 0 1 1 1 1 1 1 2>;
|
|
|
|
mdio-bus {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "okay";
|
|
|
|
phy0: ethernet-phy@0 {
|
|
reg = <0>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&spi {
|
|
status = "okay";
|
|
|
|
flash@0 {
|
|
compatible = "jedec,spi-nor";
|
|
reg = <0>;
|
|
spi-max-frequency = <25000000>;
|
|
m25p,fast-read;
|
|
|
|
partitions {
|
|
compatible = "fixed-partitions";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
uboot: partition@0 {
|
|
label = "u-boot";
|
|
reg = <0x000000 0x020000>;
|
|
read-only;
|
|
|
|
nvmem-layout {
|
|
compatible = "fixed-layout";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
macaddr_uboot_1fc00: macaddr@1fc00 {
|
|
reg = <0x1fc00 0x6>;
|
|
};
|
|
};
|
|
};
|
|
|
|
partition@20000 {
|
|
compatible = "tplink,firmware";
|
|
label = "firmware";
|
|
reg = <0x020000 0x7d0000>;
|
|
};
|
|
|
|
partition@7f0000 {
|
|
label = "art";
|
|
reg = <0x7f0000 0x010000>;
|
|
read-only;
|
|
|
|
nvmem-layout {
|
|
compatible = "fixed-layout";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
cal_art_1000: cal@1000 {
|
|
reg = <0x1000 0x440>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&usb {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb_phy {
|
|
status = "okay";
|
|
};
|
|
|
|
&pcie {
|
|
status = "okay";
|
|
|
|
ath9k: wifi@0,0 {
|
|
reg = <0x0000 0 0 0 0>;
|
|
#gpio-cells = <2>;
|
|
gpio-controller;
|
|
nvmem-cells = <&macaddr_uboot_1fc00>, <&cal_art_1000>;
|
|
nvmem-cell-names = "mac-address", "calibration";
|
|
};
|
|
};
|
|
|
|
ð0 {
|
|
status = "okay";
|
|
|
|
phy-mode = "rgmii";
|
|
nvmem-cells = <&macaddr_uboot_1fc00>;
|
|
nvmem-cell-names = "mac-address";
|
|
|
|
phy-handle = <&phy0>;
|
|
fixed-link {
|
|
speed = <1000>;
|
|
full-duplex;
|
|
};
|
|
};
|