mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-26 00:41:17 +00:00
659f4a13dd
With Linux 6.1 many of our downstream patches and out-of-tree files can be removed or at least replaced by backported upstream commits. Signed-off-by: Daniel Golle <daniel@makrotopia.org> [fix CMDLINE_OVERRIDE for arm64] Signed-off-by: Bjørn Mork <bjorn@mork.no>
89 lines
2.8 KiB
Diff
89 lines
2.8 KiB
Diff
From 9ce3b4e4719d4eec38b2c8da939c073835573d1d Mon Sep 17 00:00:00 2001
|
|
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
|
|
Date: Fri, 20 Jan 2023 10:20:53 +0100
|
|
Subject: [PATCH 07/15] clk: mediatek: clk-mt7986-topckgen: Migrate to
|
|
mtk_clk_simple_probe()
|
|
|
|
There are no more non-common calls in clk_mt7986_topckgen_probe():
|
|
migrate this driver to mtk_clk_simple_probe().
|
|
|
|
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
|
|
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
|
|
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
|
|
Link: https://lore.kernel.org/r/20230120092053.182923-24-angelogioacchino.delregno@collabora.com
|
|
Tested-by: Mingming Su <mingming.su@mediatek.com>
|
|
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
|
|
---
|
|
drivers/clk/mediatek/clk-mt7986-topckgen.c | 55 +++++-----------------
|
|
1 file changed, 13 insertions(+), 42 deletions(-)
|
|
|
|
--- a/drivers/clk/mediatek/clk-mt7986-topckgen.c
|
|
+++ b/drivers/clk/mediatek/clk-mt7986-topckgen.c
|
|
@@ -290,53 +290,24 @@ static const struct mtk_mux top_muxes[]
|
|
0x1C4, 5),
|
|
};
|
|
|
|
-static int clk_mt7986_topckgen_probe(struct platform_device *pdev)
|
|
-{
|
|
- struct clk_hw_onecell_data *clk_data;
|
|
- struct device_node *node = pdev->dev.of_node;
|
|
- int r;
|
|
- void __iomem *base;
|
|
- int nr = ARRAY_SIZE(top_fixed_clks) + ARRAY_SIZE(top_divs) +
|
|
- ARRAY_SIZE(top_muxes);
|
|
-
|
|
- base = of_iomap(node, 0);
|
|
- if (!base) {
|
|
- pr_err("%s(): ioremap failed\n", __func__);
|
|
- return -ENOMEM;
|
|
- }
|
|
-
|
|
- clk_data = mtk_alloc_clk_data(nr);
|
|
- if (!clk_data)
|
|
- return -ENOMEM;
|
|
-
|
|
- mtk_clk_register_fixed_clks(top_fixed_clks, ARRAY_SIZE(top_fixed_clks),
|
|
- clk_data);
|
|
- mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), clk_data);
|
|
- mtk_clk_register_muxes(&pdev->dev, top_muxes,
|
|
- ARRAY_SIZE(top_muxes), node,
|
|
- &mt7986_clk_lock, clk_data);
|
|
-
|
|
- r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
|
|
-
|
|
- if (r) {
|
|
- pr_err("%s(): could not register clock provider: %d\n",
|
|
- __func__, r);
|
|
- goto free_topckgen_data;
|
|
- }
|
|
- return r;
|
|
-
|
|
-free_topckgen_data:
|
|
- mtk_free_clk_data(clk_data);
|
|
- return r;
|
|
-}
|
|
+static const struct mtk_clk_desc topck_desc = {
|
|
+ .fixed_clks = top_fixed_clks,
|
|
+ .num_fixed_clks = ARRAY_SIZE(top_fixed_clks),
|
|
+ .factor_clks = top_divs,
|
|
+ .num_factor_clks = ARRAY_SIZE(top_divs),
|
|
+ .mux_clks = top_muxes,
|
|
+ .num_mux_clks = ARRAY_SIZE(top_muxes),
|
|
+ .clk_lock = &mt7986_clk_lock,
|
|
+};
|
|
|
|
static const struct of_device_id of_match_clk_mt7986_topckgen[] = {
|
|
- { .compatible = "mediatek,mt7986-topckgen", },
|
|
- {}
|
|
+ { .compatible = "mediatek,mt7986-topckgen", .data = &topck_desc },
|
|
+ { /* sentinel */ }
|
|
};
|
|
|
|
static struct platform_driver clk_mt7986_topckgen_drv = {
|
|
- .probe = clk_mt7986_topckgen_probe,
|
|
+ .probe = mtk_clk_simple_probe,
|
|
+ .remove = mtk_clk_simple_remove,
|
|
.driver = {
|
|
.name = "clk-mt7986-topckgen",
|
|
.of_match_table = of_match_clk_mt7986_topckgen,
|