openwrt/target/linux/mvebu/patches-5.4/801-pci-mvebu-time-out-reset-on-link-up.patch
Hauke Mehrtens c6ddf8d502 kernel: bump 5.4 to 5.4.179
Many changes were done in drivers/pinctrl/bcm/pinctrl-bcm2835.c between
5.4.171 and 5.4.179.
The following 3 patches do not apply any more:
* target/linux/bcm27xx/patches-5.4/950-0316-pinctrl-bcm2835-Add-support-for-BCM2711-pull-up-func.patch
  This was already integrated in kernel v5.4-rc1, it was never needed.

* target/linux/bcm27xx/patches-5.4/950-0328-Revert-pinctrl-bcm2835-Pass-irqchip-when-adding-gpio.patch
* target/linux/bcm27xx/patches-5.4/950-0362-pinctrl-bcm2835-Change-init-order-for-gpio-hogs.patch
I think these were done to fix the problem which was really fixed in
commit 75278f1aff5e ("pinctrl: bcm2835: Change init order for gpio
hogs") from v5.4.175

target/linux/generic/backport-5.4/716-v5.5-net-sfp-move-fwnode-parsing-into-sfp-bus-layer.patch
Move fwnode_device_is_available to the same position as in kernel 5.10.

target/linux/layerscape/patches-5.4/302-dts-0083-arm64-ls1028a-qds-correct-bus-of-rtc.patch
Applied in commit 65816c1034769e714edb70f59a33bc5472d9e55f ("arm64: dts:
ls1028a-qds: move rtc node to the correct i2c bus")

Compile-tested: lantiq/xrx200, bcm27xx/bcm2710
Run-tested: lantiq/xrx200

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2022-02-12 19:41:39 +01:00

61 lines
1.6 KiB
Diff

From 287b9df160b6159f8d385424904f8bac501280c1 Mon Sep 17 00:00:00 2001
From: Russell King <rmk+kernel@armlinux.org.uk>
Date: Sat, 9 Jul 2016 10:58:16 +0100
Subject: pci: mvebu: time out reset on link up
If the port reports that the link is up while we are resetting, there's
little point in waiting for the full duration.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
---
drivers/pci/controller/pci-mvebu.c | 20 ++++++++++++++------
1 file changed, 14 insertions(+), 6 deletions(-)
--- a/drivers/pci/controller/pci-mvebu.c
+++ b/drivers/pci/controller/pci-mvebu.c
@@ -944,6 +944,7 @@ static int mvebu_pcie_powerup(struct mve
if (port->reset_gpio) {
u32 reset_udelay = PCI_PM_D3COLD_WAIT * 1000;
+ unsigned int i;
of_property_read_u32(port->dn, "reset-delay-us",
&reset_udelay);
@@ -951,7 +952,13 @@ static int mvebu_pcie_powerup(struct mve
udelay(100);
gpiod_set_value_cansleep(port->reset_gpio, 0);
- msleep(reset_udelay / 1000);
+ for (i = 0; i < reset_udelay; i += 1000) {
+ if (mvebu_pcie_link_up(port))
+ break;
+ msleep(1);
+ }
+
+ printk("%s: reset completed in %dus\n", port->name, i);
}
return 0;
@@ -1115,15 +1122,16 @@ static int mvebu_pcie_probe(struct platf
if (!child)
continue;
- ret = mvebu_pcie_powerup(port);
- if (ret < 0)
- continue;
-
port->base = mvebu_pcie_map_registers(pdev, child, port);
if (IS_ERR(port->base)) {
dev_err(dev, "%s: cannot map registers\n", port->name);
port->base = NULL;
- mvebu_pcie_powerdown(port);
+ continue;
+ }
+
+ ret = mvebu_pcie_powerup(port);
+ if (ret < 0) {
+ port->base = NULL;
continue;
}