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bb1eb5e8e6
1. Add support for Marvell CN9130 SoC
2. Add support for CP115,and create an armada-cp11x.dtsi file which will be used to instantiate both CP110 and CP115
3. Add support for AP807/AP807-quad,AP807 is a major component of CN9130 SoC series
4. Drop PCIe I/O ranges from CP11x file and externalize PCIe macros from CP11x file
Signed-off-by: Ian Chang <ianchang@ieiworld.com>
(cherry picked from commit c98ddf0f01)
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
31 lines
923 B
Diff
31 lines
923 B
Diff
From 96bb4b31aa660e39fca2bb464b9a9f399bd5b71c Mon Sep 17 00:00:00 2001
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From: Miquel Raynal <miquel.raynal@bootlin.com>
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Date: Fri, 4 Oct 2019 16:27:32 +0200
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Subject: [PATCH] arm64: dts: marvell: Add support for CP115
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Create a DTSI file based on the CP11x one. Differences will be
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described in the near future.
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Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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---
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arch/arm64/boot/dts/marvell/armada-cp115.dtsi | 12 ++++++++++++
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1 file changed, 12 insertions(+)
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create mode 100644 arch/arm64/boot/dts/marvell/armada-cp115.dtsi
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--- /dev/null
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+++ b/arch/arm64/boot/dts/marvell/armada-cp115.dtsi
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@@ -0,0 +1,12 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+/*
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+ * Copyright (C) 2019 Marvell Technology Group Ltd.
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+ *
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+ * Device Tree file for Marvell Armada CP115.
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+ */
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+
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+#define CP11X_TYPE cp115
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+
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+#include "armada-cp11x.dtsi"
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+
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+#undef CP11X_TYPE
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