mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-30 18:47:06 +00:00
119 lines
4.0 KiB
Diff
119 lines
4.0 KiB
Diff
--- a/drivers/serial/8250.c
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+++ b/drivers/serial/8250.c
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@@ -302,9 +302,9 @@ static const struct serial8250_config ua
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},
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};
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-#if defined (CONFIG_SERIAL_8250_AU1X00)
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+#if defined (CONFIG_SERIAL_8250_AU1X00) || defined (CONFIG_SERIAL_8250_RT288X)
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-/* Au1x00 UART hardware has a weird register layout */
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+/* Au1x00 and RT288x UART hardware has a weird register layout */
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static const u8 au_io_in_map[] = {
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[UART_RX] = 0,
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[UART_IER] = 2,
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@@ -422,7 +422,7 @@ static unsigned int mem32_serial_in(stru
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return readl(p->membase + offset);
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}
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-#ifdef CONFIG_SERIAL_8250_AU1X00
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+#if defined(CONFIG_SERIAL_8250_AU1X00) || defined(CONFIG_SERIAL_8250_RT288X)
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static unsigned int au_serial_in(struct uart_port *p, int offset)
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{
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offset = map_8250_in_reg(p, offset) << p->regshift;
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@@ -503,7 +503,7 @@ static void set_io_from_upio(struct uart
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p->serial_out = mem32_serial_out;
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break;
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-#ifdef CONFIG_SERIAL_8250_AU1X00
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+#if defined (CONFIG_SERIAL_8250_AU1X00) || defined (CONFIG_SERIAL_8250_RT288X)
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case UPIO_AU:
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p->serial_in = au_serial_in;
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p->serial_out = au_serial_out;
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@@ -535,7 +535,7 @@ serial_out_sync(struct uart_8250_port *u
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switch (p->iotype) {
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case UPIO_MEM:
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case UPIO_MEM32:
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-#ifdef CONFIG_SERIAL_8250_AU1X00
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+#if defined (CONFIG_SERIAL_8250_AU1X00) || defined (CONFIG_SERIAL_8250_RT288X)
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case UPIO_AU:
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#endif
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case UPIO_DWAPB:
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@@ -573,8 +573,8 @@ static inline void _serial_dl_write(stru
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serial_outp(up, UART_DLM, value >> 8 & 0xff);
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}
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-#if defined(CONFIG_SERIAL_8250_AU1X00)
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-/* Au1x00 haven't got a standard divisor latch */
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+#if defined (CONFIG_SERIAL_8250_AU1X00) || defined (CONFIG_SERIAL_8250_RT288X)
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+/* Au1x00 and RT288x haven't got a standard divisor latch */
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static int serial_dl_read(struct uart_8250_port *up)
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{
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if (up->port.iotype == UPIO_AU)
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@@ -781,22 +781,19 @@ static int size_fifo(struct uart_8250_po
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*/
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static unsigned int autoconfig_read_divisor_id(struct uart_8250_port *p)
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{
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- unsigned char old_dll, old_dlm, old_lcr;
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+ unsigned char old_lcr;
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+ unsigned int old_dl;
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unsigned int id;
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old_lcr = serial_inp(p, UART_LCR);
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serial_outp(p, UART_LCR, UART_LCR_DLAB);
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- old_dll = serial_inp(p, UART_DLL);
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- old_dlm = serial_inp(p, UART_DLM);
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+ old_dl = serial_dl_read(p);
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- serial_outp(p, UART_DLL, 0);
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- serial_outp(p, UART_DLM, 0);
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+ serial_dl_write(p, 0);
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+ id = serial_dl_read(p);
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- id = serial_inp(p, UART_DLL) | serial_inp(p, UART_DLM) << 8;
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-
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- serial_outp(p, UART_DLL, old_dll);
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- serial_outp(p, UART_DLM, old_dlm);
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+ serial_dl_write(p, old_dl);
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serial_outp(p, UART_LCR, old_lcr);
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return id;
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@@ -2596,7 +2593,7 @@ static void serial8250_config_port(struc
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if (flags & UART_CONFIG_TYPE)
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autoconfig(up, probeflags);
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-#ifdef CONFIG_SERIAL_8250_AU1X00
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+#if defined (CONFIG_SERIAL_8250_AU1X00) || defined (CONFIG_SERIAL_8250_RT288X)
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/* if access method is AU, it is a 16550 with a quirk */
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if (up->port.type == PORT_16550A && up->port.iotype == UPIO_AU)
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up->bugs |= UART_BUG_NOMSR;
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--- a/drivers/serial/Kconfig
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+++ b/drivers/serial/Kconfig
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@@ -266,6 +266,14 @@ config SERIAL_8250_AU1X00
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say Y to this option. The driver can handle up to 4 serial ports,
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depending on the SOC. If unsure, say N.
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+config SERIAL_8250_RT288X
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+ bool "Ralink RT288x/RT305x serial port support"
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+ depends on SERIAL_8250 != n && (SOC_RT288X || SOC_RT305X)
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+ help
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+ If you have a Ralink RT288x/RT305x SoC based board and want to use the
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+ serial port, say Y to this option. The driver can handle up to 2 serial
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+ ports. If unsure, say N.
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+
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config SERIAL_8250_RM9K
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bool "Support for MIPS RM9xxx integrated serial port"
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depends on SERIAL_8250 != n && SERIAL_RM9000
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--- a/include/linux/serial_core.h
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+++ b/include/linux/serial_core.h
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@@ -284,7 +284,7 @@ struct uart_port {
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#define UPIO_HUB6 (1)
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#define UPIO_MEM (2)
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#define UPIO_MEM32 (3)
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-#define UPIO_AU (4) /* Au1x00 type IO */
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+#define UPIO_AU (4) /* Au1x00 and RT288x type IO */
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#define UPIO_TSI (5) /* Tsi108/109 type IO */
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#define UPIO_DWAPB (6) /* DesignWare APB UART */
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#define UPIO_RM9000 (7) /* RM9000 type IO */
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