openwrt/target/linux/ramips/patches-5.15/000-v5.18-01-dt-bindings-reset-add-dt-binding-header-for-Mediatek.patch
Shiji Yang 8cacf2bda8 ramips: add proper system clock and reset driver support for mt7621
This series of upstream patches makes the system controller node as a
reset provider[1][2], and it also includes some clock and reset driver
fixes[3][4]. Meanwhile, all clocks and resets properties in the SoC
device tree have been updated to be compatible with the new driver.

[1] https://lore.kernel.org/r/20220110114930.1406665-2-sergio.paracuellos@gmail.com
[2] https://lore.kernel.org/r/20220210094859.927868-2-sergio.paracuellos@gmail.com
[3] https://lore.kernel.org/r/20221217074806.3225150-1-sergio.paracuellos@gmail.com
[4] https://lore.kernel.org/r/20230206083305.147582-1-sergio.paracuellos@gmail.com

Tested on RAISECOM MSG1500 X.00

Signed-off-by: John Thomson <git@johnthomson.fastmail.com.au>
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
2023-07-30 13:09:23 +02:00

61 lines
2.0 KiB
Diff
Raw Blame History

This file contains ambiguous Unicode characters

This file contains Unicode characters that might be confused with other characters. If you think that this is intentional, you can safely ignore this warning. Use the Escape button to reveal them.

From f383b0770612838e78986231710c0a3afee4db42 Mon Sep 17 00:00:00 2001
From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Date: Mon, 10 Jan 2022 12:49:27 +0100
Subject: [PATCH 1/2] dt-bindings: reset: add dt binding header for Mediatek MT7621 resets
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Add dt binding header for resets lines in Mediatek MT7621 SoCs.
Acked-by: Rob Herring <robh@kernel.org>
Tested-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20220110114930.1406665-2-sergio.paracuellos@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
include/dt-bindings/reset/mt7621-reset.h | 37 ++++++++++++++++++++++++++++++++
1 file changed, 37 insertions(+)
create mode 100644 include/dt-bindings/reset/mt7621-reset.h
--- /dev/null
+++ b/include/dt-bindings/reset/mt7621-reset.h
@@ -0,0 +1,37 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+/*
+ * Copyright (c) 2021 Sergio Paracuellos
+ * Author: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+ */
+
+#ifndef DT_BINDING_MT7621_RESET_H
+#define DT_BINDING_MT7621_RESET_H
+
+#define MT7621_RST_SYS 0
+#define MT7621_RST_MCM 2
+#define MT7621_RST_HSDMA 5
+#define MT7621_RST_FE 6
+#define MT7621_RST_SPDIFTX 7
+#define MT7621_RST_TIMER 8
+#define MT7621_RST_INT 9
+#define MT7621_RST_MC 10
+#define MT7621_RST_PCM 11
+#define MT7621_RST_PIO 13
+#define MT7621_RST_GDMA 14
+#define MT7621_RST_NFI 15
+#define MT7621_RST_I2C 16
+#define MT7621_RST_I2S 17
+#define MT7621_RST_SPI 18
+#define MT7621_RST_UART1 19
+#define MT7621_RST_UART2 20
+#define MT7621_RST_UART3 21
+#define MT7621_RST_ETH 23
+#define MT7621_RST_PCIE0 24
+#define MT7621_RST_PCIE1 25
+#define MT7621_RST_PCIE2 26
+#define MT7621_RST_AUX_STCK 28
+#define MT7621_RST_CRYPTO 29
+#define MT7621_RST_SDXC 30
+#define MT7621_RST_PPE 31
+
+#endif /* DT_BINDING_MT7621_RESET_H */