mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-30 10:39:04 +00:00
ca5c695a45
Deleted following upstreamed patches: bcm27xx: 950-0006-drm-vc4-hdmi-Fix-HPD-GPIO-detection.patch bcm27xx: 950-0420-drm-vc4-Adopt-the-dma-configuration-from-the-HVS-or-.patch bcm27xx: 950-0425-drm-vc4-A-present-but-empty-dmas-disables-audio.patch bcm27xx: 950-0432-vc4-drm-Avoid-full-hdmi-audio-fifo-writes.patch bcm27xx: 950-0433-vc4-drm-vc4_plane-Remove-subpixel-positioning-check.patch bcm27xx: 950-0435-drm-vc4-Correct-pixel-order-for-DSI0.patch bcm27xx: 950-0436-drm-vc4-Register-dsi0-as-the-correct-vc4-encoder-typ.patch bcm27xx: 950-0437-drm-vc4-Fix-dsi0-interrupt-support.patch bcm27xx: 950-0438-drm-vc4-Add-correct-stop-condition-to-vc4_dsi_encode.patch bcm27xx: 950-0443-drm-vc4-Fix-timings-for-interlaced-modes.patch bcm27xx: 950-0445-drm-vc4-Fix-margin-calculations-for-the-right-bottom.patch bcm27xx: 950-0475-drm-vc4-Reset-HDMI-MISC_CONTROL-register.patch bcm27xx: 950-0476-drm-vc4-Release-workaround-buffer-and-DMA-in-error-p.patch bcm27xx: 950-0477-drm-vc4-Correct-DSI-divider-calculations.patch bcm27xx: 950-0664-drm-vc4-dsi-Correct-max-divider-to-255-not-7.patch bcm53xx: 072-next-ARM_dts_BCM53015-add-mr26.patch mediatek: 920-linux-next-dts-mt7622-bpi-r64-fix-wps-button.patch Manually rebased following patches: bcm27xx: 950-0004-drm-vc4-hdmi-Remove-the-DDC-probing-for-status-detec.patch bcm27xx: 950-0700-net-phy-lan87xx-Decrease-phy-polling-rate.patch bcm27xx: 950-0711-drm-vc4-Rename-bridge-to-out_bridge.patch bcm27xx: 950-0713-drm-vc4-Remove-splitting-the-bridge-chain-from-the-d.patch bcm27xx: 950-0715-drm-vc4-Convert-vc4_dsi-to-using-a-bridge-instead-of.patch bcm27xx: 950-0787-vc4-drm-vc4_plane-Keep-fractional-source-coords-insi.patch bcm27xx: 950-0914-mmc-block-Don-t-do-single-sector-reads-during-recove.patch Runtime tested on turris-omnia and glinet-b1300. Tested-by: John Audia <therealgraysky@proton.me> [bcm2711/RPi4B, mt7622/RT3200] Signed-off-by: Petr Štetiar <ynezz@true.cz>
32 lines
1.2 KiB
Diff
32 lines
1.2 KiB
Diff
From f818ed9b9033ef7fbe45a7f5e2fc8c0d0cfe8c1d Mon Sep 17 00:00:00 2001
|
|
From: Maxime Ripard <maxime@cerno.tech>
|
|
Date: Mon, 25 Oct 2021 17:29:01 +0200
|
|
Subject: [PATCH] drm/vc4: hdmi: Raise the maximum clock rate
|
|
|
|
Now that we have the infrastructure in place, we can raise the maximum
|
|
pixel rate we can reach for HDMI0 on the BCM2711.
|
|
|
|
HDMI1 is left untouched since its pixelvalve has a smaller FIFO and
|
|
would need a clock faster than what we can provide to support the same
|
|
modes.
|
|
|
|
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
|
|
Reviewed-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
|
|
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
|
|
Link: https://lore.kernel.org/r/20211025152903.1088803-9-maxime@cerno.tech
|
|
---
|
|
drivers/gpu/drm/vc4/vc4_hdmi.c | 2 +-
|
|
1 file changed, 1 insertion(+), 1 deletion(-)
|
|
|
|
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
|
|
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
|
|
@@ -2386,7 +2386,7 @@ static const struct vc4_hdmi_variant bcm
|
|
.encoder_type = VC4_ENCODER_TYPE_HDMI0,
|
|
.debugfs_name = "hdmi0_regs",
|
|
.card_name = "vc4-hdmi-0",
|
|
- .max_pixel_clock = HDMI_14_MAX_TMDS_CLK,
|
|
+ .max_pixel_clock = 600000000,
|
|
.registers = vc5_hdmi_hdmi0_fields,
|
|
.num_registers = ARRAY_SIZE(vc5_hdmi_hdmi0_fields),
|
|
.phy_lane_mapping = {
|