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3d5c5427e1
Support for MT7981 and MT7986 has been merged, remove patches. Tested on a couple of MT7986, MT7622 and MT7623 boards. MIPS builds are untested. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
176 lines
4.5 KiB
Diff
176 lines
4.5 KiB
Diff
From a347e374cb338213632c6dde88dd226d64bd8b27 Mon Sep 17 00:00:00 2001
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From: Weijie Gao <weijie.gao@mediatek.com>
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Date: Wed, 3 Mar 2021 08:57:29 +0800
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Subject: [PATCH 37/71] mtd: mtk-snand: add support for SPL
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Add support to initialize SPI-NAND in SPL.
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Add implementation for SPL NAND loader.
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Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
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---
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drivers/mtd/mtk-snand/Kconfig | 6 ++
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drivers/mtd/mtk-snand/Makefile | 4 +
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drivers/mtd/mtk-snand/mtk-snand-spl.c | 133 ++++++++++++++++++++++++++
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3 files changed, 143 insertions(+)
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create mode 100644 drivers/mtd/mtk-snand/mtk-snand-spl.c
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--- a/drivers/mtd/mtk-snand/Kconfig
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+++ b/drivers/mtd/mtk-snand/Kconfig
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@@ -19,3 +19,9 @@ config MTK_SPI_NAND_MTD
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help
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This option enables access to SPI-NAND flashes through the
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MTD interface of MediaTek SPI NAND Flash Controller
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+
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+config SPL_MTK_SPI_NAND
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+ tristate "SPL support for MediaTek SPI NAND flash controller"
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+ depends on MTK_SPI_NAND
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+ help
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+ This option enables access to SPI-NAND flashes in the SPL stage
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--- a/drivers/mtd/mtk-snand/Makefile
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+++ b/drivers/mtd/mtk-snand/Makefile
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@@ -8,4 +8,8 @@
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obj-y += mtk-snand.o mtk-snand-ecc.o mtk-snand-ids.o mtk-snand-os.o
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obj-$(CONFIG_MTK_SPI_NAND_MTD) += mtk-snand-mtd.o
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+ifdef CONFIG_SPL_BUILD
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+obj-$(CONFIG_SPL_MTK_SPI_NAND) += mtk-snand-spl.o
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+endif
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+
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ccflags-y += -DPRIVATE_MTK_SNAND_HEADER
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--- /dev/null
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+++ b/drivers/mtd/mtk-snand/mtk-snand-spl.c
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@@ -0,0 +1,133 @@
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+// SPDX-License-Identifier: GPL-2.0
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+/*
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+ * Copyright (C) 2020 MediaTek Inc. All Rights Reserved.
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+ *
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+ * Author: Weijie Gao <weijie.gao@mediatek.com>
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+ */
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+
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+#include <common.h>
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+#include <dm.h>
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+#include <dm/uclass.h>
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+#include <malloc.h>
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+#include <mapmem.h>
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+#include <mtd.h>
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+#include <watchdog.h>
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+
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+#include "mtk-snand.h"
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+
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+static struct mtk_snand *snf;
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+static struct mtk_snand_chip_info cinfo;
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+static u32 oobavail;
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+
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+static u8 *page_cache;
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+
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+int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst)
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+{
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+ u32 sizeremain = size, chunksize, leading;
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+ uint32_t off = offs, writesize_mask = cinfo.pagesize - 1;
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+ uint8_t *ptr = dst;
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+ int ret;
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+
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+ if (!snf)
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+ return -ENODEV;
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+
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+ while (sizeremain) {
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+ schedule();
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+
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+ leading = off & writesize_mask;
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+ chunksize = cinfo.pagesize - leading;
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+ if (chunksize > sizeremain)
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+ chunksize = sizeremain;
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+
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+ if (chunksize == cinfo.pagesize) {
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+ ret = mtk_snand_read_page(snf, off - leading, ptr,
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+ NULL, false);
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+ if (ret)
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+ break;
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+ } else {
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+ ret = mtk_snand_read_page(snf, off - leading,
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+ page_cache, NULL, false);
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+ if (ret)
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+ break;
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+
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+ memcpy(ptr, page_cache + leading, chunksize);
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+ }
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+
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+ off += chunksize;
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+ ptr += chunksize;
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+ sizeremain -= chunksize;
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+ }
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+
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+ return ret;
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+}
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+
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+void nand_init(void)
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+{
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+ struct mtk_snand_platdata mtk_snand_pdata = {};
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+ struct udevice *dev;
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+ fdt_addr_t base;
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+ int ret;
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+
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+ ret = uclass_get_device_by_driver(UCLASS_MTD, DM_DRIVER_GET(mtk_snand),
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+ &dev);
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+ if (ret) {
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+ printf("mtk-snand-spl: Device instance not found!\n");
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+ return;
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+ }
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+
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+ base = dev_read_addr_name(dev, "nfi");
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+ if (base == FDT_ADDR_T_NONE) {
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+ printf("mtk-snand-spl: NFI base not set\n");
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+ return;
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+ }
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+ mtk_snand_pdata.nfi_base = map_sysmem(base, 0);
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+
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+ base = dev_read_addr_name(dev, "ecc");
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+ if (base == FDT_ADDR_T_NONE) {
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+ printf("mtk-snand-spl: ECC base not set\n");
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+ return;
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+ }
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+ mtk_snand_pdata.ecc_base = map_sysmem(base, 0);
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+
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+ mtk_snand_pdata.soc = dev_get_driver_data(dev);
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+ mtk_snand_pdata.quad_spi = dev_read_bool(dev, "quad-spi");
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+
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+ ret = mtk_snand_init(NULL, &mtk_snand_pdata, &snf);
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+ if (ret) {
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+ printf("mtk-snand-spl: failed to initialize SPI-NAND\n");
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+ return;
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+ }
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+
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+ mtk_snand_get_chip_info(snf, &cinfo);
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+
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+ oobavail = cinfo.num_sectors * (cinfo.fdm_size - 1);
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+
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+ printf("SPI-NAND: %s (%uMB)\n", cinfo.model,
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+ (u32)(cinfo.chipsize >> 20));
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+
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+ page_cache = malloc(cinfo.pagesize + cinfo.sparesize);
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+ if (!page_cache) {
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+ mtk_snand_cleanup(snf);
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+ printf("mtk-snand-spl: failed to allocate page cache\n");
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+ }
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+}
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+
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+void nand_deselect(void)
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+{
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+
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+}
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+
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+static const struct udevice_id mtk_snand_ids[] = {
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+ { .compatible = "mediatek,mt7622-snand", .data = SNAND_SOC_MT7622 },
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+ { .compatible = "mediatek,mt7629-snand", .data = SNAND_SOC_MT7629 },
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+ { .compatible = "mediatek,mt7981-snand", .data = SNAND_SOC_MT7981 },
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+ { .compatible = "mediatek,mt7986-snand", .data = SNAND_SOC_MT7986 },
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+ { /* sentinel */ },
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+};
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+
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+U_BOOT_DRIVER(mtk_snand) = {
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+ .name = "mtk-snand",
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+ .id = UCLASS_MTD,
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+ .of_match = mtk_snand_ids,
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+ .flags = DM_FLAG_PRE_RELOC,
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+};
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