openwrt/target/linux/ath79/dts/ar1022_sitecom_wlr-7100.dts
Adrian Schmutzler 3a4b751110 ath79: enable UART in SoC DTSI files
The uart node is enabled on all devices except one (GL-USB150 *).
Thus, let's not have a few hundred nodes to enable it, but do not
disable it in the first place.

Where the majority of devices is using it, also move the serial0
alias to the DTSI.

*) Since GL-USB150 even defines serial0 alias, the missing uart
   is probably just a mistake. Anyway, disable it for now so this
   patch stays cosmetic.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2021-02-24 02:53:53 +01:00

166 lines
2.5 KiB
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "ar9344.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
model = "Sitecom WLR-7100 (X7 AC1200)";
compatible = "sitecom,wlr-7100", "qca,ar9344";
aliases {
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
};
keys {
compatible = "gpio-keys";
wlan2g {
label = "2.4GHz";
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
wlan5g {
label = "5GHz";
gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
};
leds {
compatible = "gpio-leds";
ops {
label = "white:ops";
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
};
led_power: power {
label = "amber:power";
gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
default-state = "on";
};
wlan2g {
label = "blue:wlan2g";
gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
};
};
&eth0 {
status = "okay";
pll-data = <0x06000000 0x00000101 0x00001616>;
phy-mode = "rgmii";
phy-handle = <&phy0>;
gmac-config {
device = <&gmac>;
rgmii-gmac0 = <1>;
};
};
&mdio0 {
status = "okay";
phy0: ethernet-phy@0 {
reg = <0>;
phy-mode = "rgmii";
qca,ar8327-initvals = <
0x04 0x87a00000 /* PORT0 PAD Mode */
0x0c 0x01000000 /* PORT6 PAD Mode */
0x10 0x80000000 /* PWS_REG_VALUE */
0x7c 0x000000fe /* PORT0_STATUS */
0x94 0x000000fe /* PORT6_STATUS */
>;
};
};
&pcie {
status = "okay";
wifi@0,0 {
compatible = "qcom,ath10k";
reg = <0x0000 0 0 0 0>;
};
};
&ref {
clock-frequency = <25000000>;
};
&spi {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x000000 0x030000>;
read-only;
};
uenv: partition@30000 {
label = "u-boot-env";
reg = <0x030000 0x010000>;
read-only;
};
partition@40000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x040000 0x750000>;
};
partition@790000 {
label = "backup";
reg = <0x790000 0x010000>;
read-only;
};
partition@7a0000 {
label = "storage";
reg = <0x7a0000 0x050000>;
read-only;
};
art: partition@7f0000 {
label = "art";
reg = <0x7f0000 0x010000>;
read-only;
};
};
};
};
&usb {
status = "okay";
};
&usb_phy {
status = "okay";
};
&wmac {
status = "okay";
qca,no-eeprom;
};