openwrt/target/linux/ramips/dts/mt7621_dlink_dir-2150-r1.dts

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT

#include "mt7621.dtsi"

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>

/ {
	compatible = "dlink,dir-2150-r1", "mediatek,mt7621-soc";
	model = "D-Link DIR-2150 R1";

	aliases {
		label-mac-device = &gmac1;
		led-boot = &led_power_orange;
		led-failsafe = &led_power_white;
		led-running = &led_power_white;
		led-upgrade = &led_net_orange;
	};

	keys {
		compatible = "gpio-keys";

		reset {
			label = "reset";
			gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_RESTART>;
		};

		wps {
			label = "wps";
			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_WPS_BUTTON>;
		};
	};

	leds {
		compatible = "gpio-leds";

		led_power_orange: led-0 {
			function = LED_FUNCTION_POWER;
			color = <LED_COLOR_ID_ORANGE>;
			gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
		};

		led_power_white: led-1 {
			function = LED_FUNCTION_POWER;
			color = <LED_COLOR_ID_WHITE>;
			gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
		};

		led_net_orange: led-2 {
			function = LED_FUNCTION_WAN;
			color = <LED_COLOR_ID_ORANGE>;
			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
		};

		led-3 {
			function = LED_FUNCTION_WAN;
			color = <LED_COLOR_ID_WHITE>;
			gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
		};
	};
};

&nand {
	status = "okay";

	partitions {
		compatible = "fixed-partitions";
		#address-cells = <1>;
		#size-cells = <1>;

		partition@0 {
			label = "Bootloader";
			reg = <0x0 0x80000>;
			read-only;
		};

		partition@80000 {
			label = "config";
			reg = <0x80000 0x80000>;
			read-only;
		};

		partition@100000 {
			label = "factory";
			reg = <0x100000 0x40000>;
			read-only;

			nvmem-layout {
				compatible = "fixed-layout";
				#address-cells = <1>;
				#size-cells = <1>;

				eeprom_factory_0: eeprom@0 {
					reg = <0x0 0x400>;
				};

				eeprom_factory_8000: eeprom@8000 {
					reg = <0x8000 0x4da8>;
				};

				macaddr_factory_e006: macaddr@e006 {
					compatible = "mac-base";
					reg = <0xe006 0x6>;
					#nvmem-cell-cells = <1>;
				};
			};
		};
		
		partition@140000 {
			label = "firmware";
			compatible = "denx,uimage";
			reg = <0x140000 0x7E80000>;
		};
	};
};

&pcie {
	status = "okay";
};

&pcie0 {
	wifi@0,0 {
		compatible = "mediatek,mt76";
		reg = <0x0000 0 0 0 0>;
		nvmem-cells = <&eeprom_factory_0>, <&macaddr_factory_e006 2>;
		nvmem-cell-names = "eeprom", "mac-address";
		ieee80211-freq-limit = <2400000 2500000>;

		led {
			led-active-low;
		};
	};
};

&pcie1 {
	wifi@0,0 {
		compatible = "mediatek,mt76";
		reg = <0x0000 0 0 0 0>;
		nvmem-cells = <&eeprom_factory_8000>, <&macaddr_factory_e006 4>;
		nvmem-cell-names = "eeprom", "mac-address";
		ieee80211-freq-limit = <5000000 6000000>;

		led {
			led-active-low;
		};
	};
};

&gmac0 {
	nvmem-cells = <&macaddr_factory_e006 1>;
	nvmem-cell-names = "mac-address";
};

&gmac1 {
	status = "okay";
	label = "wan";
	phy-handle = <&ethphy4>;

	nvmem-cells = <&macaddr_factory_e006 0>;
	nvmem-cell-names = "mac-address";
};

&ethphy4 {
	/delete-property/ interrupts;
};

&switch0 {
	ports {
		port@0 {
			status = "okay";
			label = "lan4";
		};

		port@1 {
			status = "okay";
			label = "lan3";
		};

		port@2 {
			status = "okay";
			label = "lan2";
		};

		port@3 {
			status = "okay";
			label = "lan1";
		};
	};
};

&state_default {
	gpio {
		groups = "i2c", "uart3", "jtag", "wdt";
		function = "gpio";
	};
};