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62b7f5931c
bcm2708: boot tested on RPi B+ v1.2
bcm2709: boot tested on RPi 3B v1.2 and RPi 4B v1.1 4G
bcm2710: boot tested on RPi 3B v1.2
bcm2711: boot tested on RPi 4B v1.1 4G
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
(cherry-picked from commit f07e572f64)
81 lines
2.7 KiB
Diff
81 lines
2.7 KiB
Diff
From a106e57a643c957af9a71eb2ec3a62df69a1f371 Mon Sep 17 00:00:00 2001
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From: Maxime Ripard <maxime@cerno.tech>
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Date: Thu, 26 Dec 2019 13:49:17 +0100
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Subject: [PATCH] drm/vc4: crtc: Rename HVS channel to output
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In vc5, the HVS has 6 outputs and 3 FIFOs (or channels), with
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pixelvalves each being assigned to a given output, but each output can
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then be muxed to feed from multiple FIFOs.
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Since vc4 had that entirely static, both were probably equivalent, but
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since that changes, let's rename hvs_channel to hvs_output in the
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vc4_crtc_data, since a pixelvalve is really connected to an output, and
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not to a FIFO.
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Signed-off-by: Maxime Ripard <maxime@cerno.tech>
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---
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drivers/gpu/drm/vc4/vc4_crtc.c | 10 +++++-----
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drivers/gpu/drm/vc4/vc4_drv.h | 4 ++--
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2 files changed, 7 insertions(+), 7 deletions(-)
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--- a/drivers/gpu/drm/vc4/vc4_crtc.c
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+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
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@@ -1057,7 +1057,7 @@ static const struct drm_crtc_helper_func
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};
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static const struct vc4_crtc_data bcm2835_pv0_data = {
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- .hvs_channel = 0,
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+ .hvs_output = 0,
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.debugfs_name = "crtc0_regs",
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.pixels_per_clock = 1,
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.encoder_types = {
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@@ -1067,7 +1067,7 @@ static const struct vc4_crtc_data bcm283
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};
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static const struct vc4_crtc_data bcm2835_pv1_data = {
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- .hvs_channel = 2,
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+ .hvs_output = 2,
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.debugfs_name = "crtc1_regs",
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.pixels_per_clock = 1,
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.encoder_types = {
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@@ -1077,7 +1077,7 @@ static const struct vc4_crtc_data bcm283
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};
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static const struct vc4_crtc_data bcm2835_pv2_data = {
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- .hvs_channel = 1,
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+ .hvs_output = 1,
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.debugfs_name = "crtc2_regs",
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.pixels_per_clock = 1,
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.encoder_types = {
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@@ -1106,7 +1106,7 @@ static void vc4_set_crtc_possible_masks(
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int i;
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/* HVS FIFO2 can feed the TXP IP. */
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- if (crtc_data->hvs_channel == 2 &&
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+ if (crtc_data->hvs_output == 2 &&
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encoder->encoder_type == DRM_MODE_ENCODER_VIRTUAL) {
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encoder->possible_crtcs |= drm_crtc_mask(crtc);
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continue;
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@@ -1168,7 +1168,7 @@ static int vc4_crtc_bind(struct device *
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drm_crtc_init_with_planes(drm, crtc, primary_plane, NULL,
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&vc4_crtc_funcs, NULL);
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drm_crtc_helper_add(crtc, &vc4_crtc_helper_funcs);
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- vc4_crtc->channel = vc4_crtc->data->hvs_channel;
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+ vc4_crtc->channel = vc4_crtc->data->hvs_output;
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drm_mode_crtc_set_gamma_size(crtc, ARRAY_SIZE(vc4_crtc->lut_r));
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drm_crtc_enable_color_mgmt(crtc, 0, false, crtc->gamma_size);
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--- a/drivers/gpu/drm/vc4/vc4_drv.h
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+++ b/drivers/gpu/drm/vc4/vc4_drv.h
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@@ -452,8 +452,8 @@ to_vc4_encoder(struct drm_encoder *encod
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}
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struct vc4_crtc_data {
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- /* Which channel of the HVS this pixelvalve sources from. */
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- int hvs_channel;
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+ /* Which output of the HVS this pixelvalve sources from. */
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+ int hvs_output;
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/* Number of pixels output per clock period */
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u8 pixels_per_clock;
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