openwrt/target/linux/ramips/dts/mt7628an_tplink_tl-wr841n-v13.dts
Chuanhong Guo b756ea2a90 ramips: replace pinctrl property names
Upstream pinctrl driver in drivers/staging uses
groups/function/ralink,num-gpios instead of
ralink,group/ralink,function/ralink,nr-gpio
Replace these properties in dts as well as the pinctrl driver in
patches-4.14.
This commit is created using:
sed -i 's/ralink,group/groups/g'
sed -i 's/ralink,function/function/g'
sed -i 's/ralink,nr-gpio/ralink,num-gpios/g'

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2020-04-12 22:29:17 +08:00

92 lines
1.6 KiB
Plaintext

/dts-v1/;
#include "mt7628an_tplink_8m.dtsi"
/ {
compatible = "tplink,tl-wr841n-v13", "mediatek,mt7628an-soc";
model = "TP-Link TL-WR841N v13";
aliases {
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
rfkill {
label = "rfkill";
gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RFKILL>;
};
};
leds {
compatible = "gpio-leds";
led_power: power {
label = "tl-wr841n-v13:green:power";
gpios = <&gpio 36 GPIO_ACTIVE_LOW>;
};
wps {
label = "tl-wr841n-v13:green:wps";
gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
};
lan1 {
label = "tl-wr841n-v13:green:lan1";
gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
};
lan2 {
label = "tl-wr841n-v13:green:lan2";
gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
};
lan3 {
label = "tl-wr841n-v13:green:lan3";
gpios = <&gpio 40 GPIO_ACTIVE_LOW>;
};
lan4 {
label = "tl-wr841n-v13:green:lan4";
gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
};
wan_green {
label = "tl-wr841n-v13:green:wan";
gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
};
wan_orange {
label = "tl-wr841n-v13:orange:wan";
gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
};
wlan {
label = "tl-wr841n-v13:green:wlan";
gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
};
};
};
&state_default {
gpio {
groups = "gpio", "p0led_an", "p1led_an", "p2led_an", "p3led_an", "p4led_an", "perst", "refclk", "uart1", "wdt", "wled_an";
function = "gpio";
};
};
&esw {
mediatek,portmap = <0x3e>;
};