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793f8ab62c
Add kernel patches for version 6.1. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
97 lines
3.9 KiB
Diff
97 lines
3.9 KiB
Diff
From 8c5a3ead40c1778595be768db284c66c03546e2d Mon Sep 17 00:00:00 2001
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From: Dom Cobley <popcornmix@gmail.com>
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Date: Fri, 21 Apr 2023 20:24:54 +0100
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Subject: [PATCH] bcm2835-dma: Support dma flags for multi-beat burst
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Add a control bit to enable a multi-beat burst on a DMA.
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This improves DMA performance and is required for HDMI audio.
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Signed-off-by: Dom Cobley <popcornmix@gmail.com>
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---
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drivers/dma/bcm2835-dma.c | 28 ++++++++++++++++++++--------
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1 file changed, 20 insertions(+), 8 deletions(-)
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--- a/drivers/dma/bcm2835-dma.c
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+++ b/drivers/dma/bcm2835-dma.c
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@@ -158,7 +158,8 @@ struct bcm2835_desc {
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#define BCM2835_DMA_S_WIDTH BIT(9) /* 128bit writes if set */
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#define BCM2835_DMA_S_DREQ BIT(10) /* enable SREQ for source */
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#define BCM2835_DMA_S_IGNORE BIT(11) /* ignore source reads - read 0 */
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-#define BCM2835_DMA_BURST_LENGTH(x) ((x & 15) << 12)
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+#define BCM2835_DMA_BURST_LENGTH(x) (((x) & 15) << 12)
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+#define BCM2835_DMA_GET_BURST_LENGTH(x) (((x) >> 12) & 15)
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#define BCM2835_DMA_CS_FLAGS(x) (x & (BCM2835_DMA_PRIORITY(15) | \
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BCM2835_DMA_PANIC_PRIORITY(15) | \
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BCM2835_DMA_WAIT_FOR_WRITES | \
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@@ -182,6 +183,11 @@ struct bcm2835_desc {
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#define WIDE_DEST(x) ((x & BCM2835_DMA_WIDE_DEST) ? \
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BCM2835_DMA_D_WIDTH : 0)
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+/* A fake bit to request that the driver requires multi-beat burst */
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+#define BCM2835_DMA_BURST BIT(30)
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+#define BURST_LENGTH(x) ((x & BCM2835_DMA_BURST) ? \
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+ BCM2835_DMA_BURST_LENGTH(3) : 0)
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+
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/* debug register bits */
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#define BCM2835_DMA_DEBUG_LAST_NOT_SET_ERR BIT(0)
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@@ -285,7 +291,7 @@ struct bcm2835_desc {
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/* the max dma length for different channels */
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#define MAX_DMA40_LEN SZ_1G
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-#define BCM2711_DMA40_BURST_LEN(x) ((min(x,16) - 1) << 8)
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+#define BCM2711_DMA40_BURST_LEN(x) (((x) & 15) << 8)
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#define BCM2711_DMA40_INC BIT(12)
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#define BCM2711_DMA40_SIZE_32 (0 << 13)
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#define BCM2711_DMA40_SIZE_64 (1 << 13)
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@@ -362,12 +368,16 @@ static inline uint32_t to_bcm2711_ti(uin
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static inline uint32_t to_bcm2711_srci(uint32_t info)
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{
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- return ((info & BCM2835_DMA_S_INC) ? BCM2711_DMA40_INC : 0);
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+ return ((info & BCM2835_DMA_S_INC) ? BCM2711_DMA40_INC : 0) |
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+ ((info & BCM2835_DMA_S_WIDTH) ? BCM2711_DMA40_SIZE_128 : 0) |
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+ BCM2711_DMA40_BURST_LEN(BCM2835_DMA_GET_BURST_LENGTH(info));
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}
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static inline uint32_t to_bcm2711_dsti(uint32_t info)
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{
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- return ((info & BCM2835_DMA_D_INC) ? BCM2711_DMA40_INC : 0);
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+ return ((info & BCM2835_DMA_D_INC) ? BCM2711_DMA40_INC : 0) |
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+ ((info & BCM2835_DMA_D_WIDTH) ? BCM2711_DMA40_SIZE_128 : 0) |
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+ BCM2711_DMA40_BURST_LEN(BCM2835_DMA_GET_BURST_LENGTH(info));
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}
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static inline uint32_t to_bcm2711_cbaddr(dma_addr_t addr)
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@@ -936,7 +946,8 @@ static struct dma_async_tx_descriptor *b
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struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
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struct bcm2835_desc *d;
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u32 info = BCM2835_DMA_D_INC | BCM2835_DMA_S_INC |
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- WAIT_RESP(c->dreq) | WIDE_SOURCE(c->dreq) | WIDE_DEST(c->dreq);
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+ WAIT_RESP(c->dreq) | WIDE_SOURCE(c->dreq) |
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+ WIDE_DEST(c->dreq) | BURST_LENGTH(c->dreq);
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u32 extra = BCM2835_DMA_INT_EN;
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size_t max_len = bcm2835_dma_max_frame_length(c);
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size_t frames;
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@@ -967,8 +978,8 @@ static struct dma_async_tx_descriptor *b
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struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
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struct bcm2835_desc *d;
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dma_addr_t src = 0, dst = 0;
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- u32 info = WAIT_RESP(c->dreq) |
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- WIDE_SOURCE(c->dreq) | WIDE_DEST(c->dreq);
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+ u32 info = WAIT_RESP(c->dreq) | WIDE_SOURCE(c->dreq) |
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+ WIDE_DEST(c->dreq) | BURST_LENGTH(c->dreq);
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u32 extra = BCM2835_DMA_INT_EN;
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size_t frames;
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@@ -1020,7 +1031,8 @@ static struct dma_async_tx_descriptor *b
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struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
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struct bcm2835_desc *d;
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dma_addr_t src, dst;
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- u32 info = WAIT_RESP(c->dreq) | WIDE_SOURCE(c->dreq) | WIDE_DEST(c->dreq);
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+ u32 info = WAIT_RESP(c->dreq) | WIDE_SOURCE(c->dreq) |
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+ WIDE_DEST(c->dreq) | BURST_LENGTH(c->dreq);
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u32 extra = 0;
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size_t max_len = bcm2835_dma_max_frame_length(c);
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size_t frames;
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