openwrt/target/linux/octeontx/patches-5.10/0004-PCI-add-quirk-for-Gateworks-PLX-PEX860x-switch-with-.patch
Rui Salvaterra 1343acc8cd kernel: bump 5.10 to 5.10.94
Deleted (upstreamed):
bcm27xx/patches-5.10/950-0669-drm-vc4-hdmi-Make-sure-the-device-is-powered-with-CE.patch [1]
bcm27xx/patches-5.10/950-0672-drm-vc4-hdmi-Move-initial-register-read-after-pm_run.patch [1]
gemini/patches-5.10/0003-ARM-dts-gemini-NAS4220-B-fis-index-block-with-128-Ki.patch [2]

Manually rebased:
bcm27xx/patches-5.10/950-0675-drm-vc4-hdmi-Drop-devm-interrupt-handler-for-CEC-int.patch

Manually reverted:
generic/pending-5.10/860-Revert-ASoC-mediatek-Check-for-error-clk-pointer.patch [3]

[1] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.10.94&id=55b10b88ac8654fc2f31518aa349a2e643b37f18
[2] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.10.94&id=958a8819d41420d7a74ed922a09cacc0ba3a4218
[3] https://lore.kernel.org/all/trinity-2a727d96-0335-4d03-8f30-e22a0e10112d-1643363480085@3c-app-gmx-bap33/

Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2022-02-01 23:34:07 +00:00

60 lines
1.9 KiB
Diff

From d0ff7a1bcfe886cab1a237895b08ac51ecfe10e7 Mon Sep 17 00:00:00 2001
From: Tim Harvey <tharvey@gateworks.com>
Date: Wed, 10 Apr 2019 08:00:47 -0700
Subject: [PATCH 04/12] PCI: add quirk for Gateworks PLX PEX860x switch with
GPIO PERST#
Gateworks boards use PLX PEX860x switches where downstream ports
have their PERST# driven from the PEX GPIO.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
drivers/pci/quirks.c | 32 ++++++++++++++++++++++++++++++++
1 file changed, 32 insertions(+)
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -25,6 +25,7 @@
#include <linux/ktime.h>
#include <linux/mm.h>
#include <linux/nvme.h>
+#include <linux/of.h>
#include <linux/platform_data/x86/apple.h>
#include <linux/pm_runtime.h>
#include <linux/suspend.h>
@@ -5772,3 +5773,34 @@ static void nvidia_ion_ahci_fixup(struct
pdev->dev_flags |= PCI_DEV_FLAGS_HAS_MSI_MASKING;
}
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, 0x0ab8, nvidia_ion_ahci_fixup);
+
+#ifdef CONFIG_PCI_HOST_THUNDER_PEM
+/*
+ * fixup for PLX PEX8909 bridge to configure GPIO1-7 as output High
+ * as they are used for slots1-7 PERST#
+ */
+static void newport_pciesw_early_fixup(struct pci_dev *dev)
+{
+ u32 dw;
+
+ if (!of_machine_is_compatible("gw,newport"))
+ return;
+
+ if (dev->devfn != 0)
+ return;
+
+ dev_info(&dev->dev, "de-asserting PERST#\n");
+ pci_read_config_dword(dev, 0x62c, &dw);
+ dw |= 0xaaa8; /* GPIO1-7 outputs */
+ pci_write_config_dword(dev, 0x62c, dw);
+
+ pci_read_config_dword(dev, 0x644, &dw);
+ dw |= 0xfe; /* GPIO1-7 output high */
+ pci_write_config_dword(dev, 0x644, dw);
+
+ msleep(100);
+}
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8609, newport_pciesw_early_fixup);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8606, newport_pciesw_early_fixup);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8604, newport_pciesw_early_fixup);
+#endif /* CONFIG_PCI_HOST_THUNDER_PEM */