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e2e2fc3cd0
Add updated patches for 6.6. DMA/cache-handling patches have been reworked / backported from upstream. Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
123 lines
3.5 KiB
Diff
123 lines
3.5 KiB
Diff
From 1bf849b606d0b4cae643f96685d3d3981643683d Mon Sep 17 00:00:00 2001
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From: Changhuang Liang <changhuang.liang@starfivetech.com>
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Date: Wed, 13 Sep 2023 14:54:28 +0100
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Subject: [PATCH 042/116] pmdomain: starfive: Add JH7110 AON PMU support
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Add AON PMU for StarFive JH7110 SoC. It can be used to turn on/off the
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dphy rx/tx power switch.
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Reviewed-by: Walker Chen <walker.chen@starfivetech.com>
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Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
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Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
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Link: https://lore.kernel.org/r/20230913-dude-imprecise-fc32622bc947@spud
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Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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---
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drivers/pmdomain/starfive/jh71xx-pmu.c | 57 +++++++++++++++++++++++---
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1 file changed, 52 insertions(+), 5 deletions(-)
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--- a/drivers/pmdomain/starfive/jh71xx-pmu.c
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+++ b/drivers/pmdomain/starfive/jh71xx-pmu.c
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@@ -2,7 +2,7 @@
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/*
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* StarFive JH71XX PMU (Power Management Unit) Controller Driver
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*
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- * Copyright (C) 2022 StarFive Technology Co., Ltd.
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+ * Copyright (C) 2022-2023 StarFive Technology Co., Ltd.
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*/
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#include <linux/interrupt.h>
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@@ -24,6 +24,9 @@
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#define JH71XX_PMU_EVENT_STATUS 0x88
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#define JH71XX_PMU_INT_STATUS 0x8C
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+/* aon pmu register offset */
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+#define JH71XX_AON_PMU_SWITCH 0x00
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+
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/* sw encourage cfg */
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#define JH71XX_PMU_SW_ENCOURAGE_EN_LO 0x05
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#define JH71XX_PMU_SW_ENCOURAGE_EN_HI 0x50
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@@ -160,6 +163,26 @@ static int jh7110_pmu_set_state(struct j
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return 0;
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}
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+static int jh7110_aon_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on)
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+{
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+ struct jh71xx_pmu *pmu = pmd->pmu;
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+ unsigned long flags;
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+ u32 val;
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+
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+ spin_lock_irqsave(&pmu->lock, flags);
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+ val = readl(pmu->base + JH71XX_AON_PMU_SWITCH);
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+
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+ if (on)
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+ val |= mask;
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+ else
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+ val &= ~mask;
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+
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+ writel(val, pmu->base + JH71XX_AON_PMU_SWITCH);
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+ spin_unlock_irqrestore(&pmu->lock, flags);
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+
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+ return 0;
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+}
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+
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static int jh71xx_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on)
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{
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struct jh71xx_pmu *pmu = pmd->pmu;
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@@ -317,10 +340,12 @@ static int jh71xx_pmu_probe(struct platf
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if (!match_data)
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return -EINVAL;
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- ret = match_data->pmu_parse_irq(pdev, pmu);
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- if (ret) {
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- dev_err(dev, "failed to parse irq\n");
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- return ret;
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+ if (match_data->pmu_parse_irq) {
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+ ret = match_data->pmu_parse_irq(pdev, pmu);
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+ if (ret) {
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+ dev_err(dev, "failed to parse irq\n");
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+ return ret;
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+ }
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}
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pmu->genpd = devm_kcalloc(dev, match_data->num_domains,
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@@ -394,11 +419,32 @@ static const struct jh71xx_pmu_match_dat
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.pmu_set_state = jh7110_pmu_set_state,
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};
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+static const struct jh71xx_domain_info jh7110_aon_power_domains[] = {
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+ [JH7110_PD_DPHY_TX] = {
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+ .name = "DPHY-TX",
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+ .bit = 30,
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+ },
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+ [JH7110_PD_DPHY_RX] = {
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+ .name = "DPHY-RX",
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+ .bit = 31,
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+ },
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+};
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+
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+static const struct jh71xx_pmu_match_data jh7110_aon_pmu = {
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+ .num_domains = ARRAY_SIZE(jh7110_aon_power_domains),
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+ .domain_info = jh7110_aon_power_domains,
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+ .pmu_status = JH71XX_AON_PMU_SWITCH,
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+ .pmu_set_state = jh7110_aon_pmu_set_state,
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+};
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+
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static const struct of_device_id jh71xx_pmu_of_match[] = {
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{
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.compatible = "starfive,jh7110-pmu",
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.data = (void *)&jh7110_pmu,
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}, {
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+ .compatible = "starfive,jh7110-aon-syscon",
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+ .data = (void *)&jh7110_aon_pmu,
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+ }, {
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/* sentinel */
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}
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};
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@@ -414,5 +460,6 @@ static struct platform_driver jh71xx_pmu
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builtin_platform_driver(jh71xx_pmu_driver);
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MODULE_AUTHOR("Walker Chen <walker.chen@starfivetech.com>");
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+MODULE_AUTHOR("Changhuang Liang <changhuang.liang@starfivetech.com>");
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MODULE_DESCRIPTION("StarFive JH71XX PMU Driver");
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MODULE_LICENSE("GPL");
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