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01d8e41c16
Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.6.51 Removed upstreamed: generic/backport-6.6/200-regmap-maple-work-around-false-positive-warning.patch generic/backport-6.6/822-v6.11-0012-nvmem-Fix-return-type-of-devm_nvmem_device_get-in-ke.patch bcm27xx/patches-6.6/950-1018-drivers-mmc-apply-SD-quirks-earlier-during-probe.patch Manually rebased: bcm27xx/patches-6.6/950-0993-drivers-mmc-cqhci-clear-CQHCI_CTL-if-halt-fails.patch ramips/patches-6.6/311-MIPS-use-set_mode-to-enable-disable-the-cevt-r4k-irq.patch[4] All other patches automatically rebased. 1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.6.51&id=e42ea96d6d36a16526cb82b8aa2e5422814c3250 2. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.6.51&id=3d1baf322a3a69b38b6b2d511cfe0d611d1b5462 3. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.6.51&id=115a755bb38db5a1175be44e6a9a93a0a8233885 4. Adapted the changes from Hauke Mehrtens' modification in PR#16366 to 5.15.167 Build system: x86/64 Build-tested: x86/64/AMD Cezanne, flogic/xiaomi_redmi-router-ax6000-ubootmod, ramips/tplink_archer-a6-v3 Run-tested: x86/64/AMD Cezanne, flogic/xiaomi_redmi-router-ax6000-ubootmod, ramips/tplink_archer-a6-v3 Signed-off-by: John Audia <therealgraysky@proton.me> Link: https://github.com/openwrt/openwrt/pull/16370 Signed-off-by: Robert Marko <robimarko@gmail.com>
201 lines
5.7 KiB
Diff
201 lines
5.7 KiB
Diff
From 68a1bbb99455fd5ea80b7e21ec726f369abc9572 Mon Sep 17 00:00:00 2001
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From: Jia Jie Ho <jiajie.ho@starfivetech.com>
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Date: Wed, 15 Nov 2023 01:12:14 +0800
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Subject: [PATCH 010/116] crypto: starfive - RSA poll csr for done status
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Hardware could not clear irq status without resetting the entire module.
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Driver receives irq immediately when mask bit is cleared causing
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intermittent errors in RSA calculations. Switch to use csr polling for
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done status instead.
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Signed-off-by: Jia Jie Ho <jiajie.ho@starfivetech.com>
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Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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---
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drivers/crypto/starfive/jh7110-cryp.c | 8 -----
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drivers/crypto/starfive/jh7110-cryp.h | 10 +++++-
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drivers/crypto/starfive/jh7110-rsa.c | 49 +++++++--------------------
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3 files changed, 22 insertions(+), 45 deletions(-)
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--- a/drivers/crypto/starfive/jh7110-cryp.c
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+++ b/drivers/crypto/starfive/jh7110-cryp.c
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@@ -109,12 +109,6 @@ static irqreturn_t starfive_cryp_irq(int
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tasklet_schedule(&cryp->hash_done);
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}
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- if (status & STARFIVE_IE_FLAG_PKA_DONE) {
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- mask |= STARFIVE_IE_MASK_PKA_DONE;
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- writel(mask, cryp->base + STARFIVE_IE_MASK_OFFSET);
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- complete(&cryp->pka_done);
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- }
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-
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return IRQ_HANDLED;
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}
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@@ -159,8 +153,6 @@ static int starfive_cryp_probe(struct pl
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return dev_err_probe(&pdev->dev, PTR_ERR(cryp->rst),
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"Error getting hardware reset line\n");
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- init_completion(&cryp->pka_done);
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-
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irq = platform_get_irq(pdev, 0);
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if (irq < 0)
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return irq;
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--- a/drivers/crypto/starfive/jh7110-cryp.h
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+++ b/drivers/crypto/starfive/jh7110-cryp.h
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@@ -126,6 +126,15 @@ union starfive_pka_cacr {
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};
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};
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+union starfive_pka_casr {
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+ u32 v;
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+ struct {
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+#define STARFIVE_PKA_DONE BIT(0)
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+ u32 done :1;
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+ u32 rsvd_0 :31;
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+ };
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+};
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+
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struct starfive_rsa_key {
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u8 *n;
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u8 *e;
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@@ -184,7 +193,6 @@ struct starfive_cryp_dev {
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struct crypto_engine *engine;
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struct tasklet_struct aes_done;
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struct tasklet_struct hash_done;
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- struct completion pka_done;
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size_t assoclen;
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size_t total_in;
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size_t total_out;
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--- a/drivers/crypto/starfive/jh7110-rsa.c
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+++ b/drivers/crypto/starfive/jh7110-rsa.c
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@@ -6,13 +6,7 @@
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*/
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#include <linux/crypto.h>
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-#include <linux/delay.h>
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-#include <linux/device.h>
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-#include <linux/dma-direct.h>
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-#include <linux/interrupt.h>
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#include <linux/iopoll.h>
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-#include <linux/io.h>
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-#include <linux/mod_devicetable.h>
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#include <crypto/akcipher.h>
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#include <crypto/algapi.h>
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#include <crypto/internal/akcipher.h>
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@@ -28,13 +22,13 @@
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#define STARFIVE_PKA_CAER_OFFSET (STARFIVE_PKA_REGS_OFFSET + 0x108)
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#define STARFIVE_PKA_CANR_OFFSET (STARFIVE_PKA_REGS_OFFSET + 0x208)
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-// R^2 mod N and N0'
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+/* R ^ 2 mod N and N0' */
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#define CRYPTO_CMD_PRE 0x0
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-// A * R mod N ==> A
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+/* A * R mod N ==> A */
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#define CRYPTO_CMD_ARN 0x5
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-// A * E * R mod N ==> A
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+/* A * E * R mod N ==> A */
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#define CRYPTO_CMD_AERN 0x6
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-// A * A * R mod N ==> A
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+/* A * A * R mod N ==> A */
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#define CRYPTO_CMD_AARN 0x7
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#define STARFIVE_RSA_RESET 0x2
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@@ -42,21 +36,10 @@
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static inline int starfive_pka_wait_done(struct starfive_cryp_ctx *ctx)
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{
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struct starfive_cryp_dev *cryp = ctx->cryp;
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+ u32 status;
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- return wait_for_completion_timeout(&cryp->pka_done,
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- usecs_to_jiffies(100000));
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-}
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-
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-static inline void starfive_pka_irq_mask_clear(struct starfive_cryp_ctx *ctx)
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-{
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- struct starfive_cryp_dev *cryp = ctx->cryp;
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- u32 stat;
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-
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- stat = readl(cryp->base + STARFIVE_IE_MASK_OFFSET);
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- stat &= ~STARFIVE_IE_MASK_PKA_DONE;
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- writel(stat, cryp->base + STARFIVE_IE_MASK_OFFSET);
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-
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- reinit_completion(&cryp->pka_done);
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+ return readl_relaxed_poll_timeout(cryp->base + STARFIVE_PKA_CASR_OFFSET, status,
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+ status & STARFIVE_PKA_DONE, 10, 100000);
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}
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static void starfive_rsa_free_key(struct starfive_rsa_key *key)
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@@ -113,10 +96,9 @@ static int starfive_rsa_montgomery_form(
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rctx->csr.pka.not_r2 = 1;
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rctx->csr.pka.ie = 1;
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- starfive_pka_irq_mask_clear(ctx);
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writel(rctx->csr.pka.v, cryp->base + STARFIVE_PKA_CACR_OFFSET);
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- if (!starfive_pka_wait_done(ctx))
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+ if (starfive_pka_wait_done(ctx))
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return -ETIMEDOUT;
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for (loop = 0; loop <= opsize; loop++)
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@@ -135,10 +117,9 @@ static int starfive_rsa_montgomery_form(
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rctx->csr.pka.start = 1;
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rctx->csr.pka.ie = 1;
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- starfive_pka_irq_mask_clear(ctx);
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writel(rctx->csr.pka.v, cryp->base + STARFIVE_PKA_CACR_OFFSET);
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- if (!starfive_pka_wait_done(ctx))
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+ if (starfive_pka_wait_done(ctx))
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return -ETIMEDOUT;
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} else {
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rctx->csr.pka.v = 0;
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@@ -150,10 +131,9 @@ static int starfive_rsa_montgomery_form(
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rctx->csr.pka.pre_expf = 1;
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rctx->csr.pka.ie = 1;
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- starfive_pka_irq_mask_clear(ctx);
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writel(rctx->csr.pka.v, cryp->base + STARFIVE_PKA_CACR_OFFSET);
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- if (!starfive_pka_wait_done(ctx))
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+ if (starfive_pka_wait_done(ctx))
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return -ETIMEDOUT;
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for (loop = 0; loop <= count; loop++)
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@@ -171,10 +151,9 @@ static int starfive_rsa_montgomery_form(
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rctx->csr.pka.start = 1;
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rctx->csr.pka.ie = 1;
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- starfive_pka_irq_mask_clear(ctx);
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writel(rctx->csr.pka.v, cryp->base + STARFIVE_PKA_CACR_OFFSET);
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- if (!starfive_pka_wait_done(ctx))
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+ if (starfive_pka_wait_done(ctx))
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return -ETIMEDOUT;
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}
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@@ -225,11 +204,10 @@ static int starfive_rsa_cpu_start(struct
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rctx->csr.pka.start = 1;
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rctx->csr.pka.ie = 1;
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- starfive_pka_irq_mask_clear(ctx);
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writel(rctx->csr.pka.v, cryp->base + STARFIVE_PKA_CACR_OFFSET);
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ret = -ETIMEDOUT;
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- if (!starfive_pka_wait_done(ctx))
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+ if (starfive_pka_wait_done(ctx))
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goto rsa_err;
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if (mlen) {
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@@ -241,10 +219,9 @@ static int starfive_rsa_cpu_start(struct
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rctx->csr.pka.start = 1;
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rctx->csr.pka.ie = 1;
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- starfive_pka_irq_mask_clear(ctx);
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writel(rctx->csr.pka.v, cryp->base + STARFIVE_PKA_CACR_OFFSET);
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- if (!starfive_pka_wait_done(ctx))
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+ if (starfive_pka_wait_done(ctx))
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goto rsa_err;
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}
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}
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