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99545b4bb1
This target adds support for the Allwinner D1 RISC-V based SoCs.
- RISC-V single-core T-Head C906 (RV64GCV)
- Tensilica HiFi4 DSP
- DDR2/DDR3 support
- 10/100/1000M ethernet
- usual peripherals like USB2, SPI, I2C, PWM, etc.
Four boards are supported:
- Dongshan Nezha STU
- 512Mb RAM
- ethernet
- LicheePi RV Dock
- 512Mb RAM
- wireless-only (RTL8723DS)
- MangoPi MQ-Pro
- 512Mb RAM
- there are pads available for an SPI flash
- wireless-only (RTL8723DS)
- Nezha D1
- 512Mb/1Gb/2Gb RAM
- 256Mb NAND flash
- ethernet, wireless
Installation:
Standard SD-card installation via dd-ing the generated image to
an SD-card of at least 256Mb.
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
110 lines
3.5 KiB
Diff
110 lines
3.5 KiB
Diff
From b953c09bde508c2edd8acd95abba8542b6cebff6 Mon Sep 17 00:00:00 2001
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From: Samuel Holland <samuel@sholland.org>
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Date: Sun, 7 Aug 2022 11:44:09 -0500
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Subject: [PATCH 105/117] phy: allwinner: phy-sun6i-mipi-dphy: Add a variant
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power-on hook
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The A100 variant uses the same values for the timing registers, and it
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uses the same final power-on sequence, but it needs a different analog
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register configuration in the middle. Support this by moving the
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variant-specific parts to a hook provided by the variant.
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Signed-off-by: Samuel Holland <samuel@sholland.org>
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---
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drivers/phy/allwinner/phy-sun6i-mipi-dphy.c | 59 ++++++++++++---------
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1 file changed, 35 insertions(+), 24 deletions(-)
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--- a/drivers/phy/allwinner/phy-sun6i-mipi-dphy.c
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+++ b/drivers/phy/allwinner/phy-sun6i-mipi-dphy.c
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@@ -114,7 +114,10 @@ enum sun6i_dphy_direction {
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SUN6I_DPHY_DIRECTION_RX,
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};
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+struct sun6i_dphy;
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+
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struct sun6i_dphy_variant {
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+ void (*tx_power_on)(struct sun6i_dphy *dphy);
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bool supports_rx;
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};
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@@ -156,33 +159,10 @@ static int sun6i_dphy_configure(struct p
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return 0;
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}
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-static int sun6i_dphy_tx_power_on(struct sun6i_dphy *dphy)
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+static void sun6i_a31_mipi_dphy_tx_power_on(struct sun6i_dphy *dphy)
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{
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u8 lanes_mask = GENMASK(dphy->config.lanes - 1, 0);
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- regmap_write(dphy->regs, SUN6I_DPHY_TX_CTL_REG,
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- SUN6I_DPHY_TX_CTL_HS_TX_CLK_CONT);
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-
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- regmap_write(dphy->regs, SUN6I_DPHY_TX_TIME0_REG,
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- SUN6I_DPHY_TX_TIME0_LP_CLK_DIV(14) |
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- SUN6I_DPHY_TX_TIME0_HS_PREPARE(6) |
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- SUN6I_DPHY_TX_TIME0_HS_TRAIL(10));
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-
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- regmap_write(dphy->regs, SUN6I_DPHY_TX_TIME1_REG,
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- SUN6I_DPHY_TX_TIME1_CLK_PREPARE(7) |
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- SUN6I_DPHY_TX_TIME1_CLK_ZERO(50) |
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- SUN6I_DPHY_TX_TIME1_CLK_PRE(3) |
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- SUN6I_DPHY_TX_TIME1_CLK_POST(10));
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-
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- regmap_write(dphy->regs, SUN6I_DPHY_TX_TIME2_REG,
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- SUN6I_DPHY_TX_TIME2_CLK_TRAIL(30));
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-
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- regmap_write(dphy->regs, SUN6I_DPHY_TX_TIME3_REG, 0);
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-
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- regmap_write(dphy->regs, SUN6I_DPHY_TX_TIME4_REG,
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- SUN6I_DPHY_TX_TIME4_HS_TX_ANA0(3) |
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- SUN6I_DPHY_TX_TIME4_HS_TX_ANA1(3));
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-
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regmap_write(dphy->regs, SUN6I_DPHY_ANA0_REG,
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SUN6I_DPHY_ANA0_REG_PWS |
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SUN6I_DPHY_ANA0_REG_DMPC |
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@@ -214,6 +194,36 @@ static int sun6i_dphy_tx_power_on(struct
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SUN6I_DPHY_ANA3_EN_LDOC |
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SUN6I_DPHY_ANA3_EN_LDOD);
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udelay(1);
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+}
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+
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+static int sun6i_dphy_tx_power_on(struct sun6i_dphy *dphy)
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+{
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+ u8 lanes_mask = GENMASK(dphy->config.lanes - 1, 0);
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+
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+ regmap_write(dphy->regs, SUN6I_DPHY_TX_CTL_REG,
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+ SUN6I_DPHY_TX_CTL_HS_TX_CLK_CONT);
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+
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+ regmap_write(dphy->regs, SUN6I_DPHY_TX_TIME0_REG,
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+ SUN6I_DPHY_TX_TIME0_LP_CLK_DIV(14) |
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+ SUN6I_DPHY_TX_TIME0_HS_PREPARE(6) |
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+ SUN6I_DPHY_TX_TIME0_HS_TRAIL(10));
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+
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+ regmap_write(dphy->regs, SUN6I_DPHY_TX_TIME1_REG,
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+ SUN6I_DPHY_TX_TIME1_CLK_PREPARE(7) |
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+ SUN6I_DPHY_TX_TIME1_CLK_ZERO(50) |
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+ SUN6I_DPHY_TX_TIME1_CLK_PRE(3) |
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+ SUN6I_DPHY_TX_TIME1_CLK_POST(10));
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+
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+ regmap_write(dphy->regs, SUN6I_DPHY_TX_TIME2_REG,
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+ SUN6I_DPHY_TX_TIME2_CLK_TRAIL(30));
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+
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+ regmap_write(dphy->regs, SUN6I_DPHY_TX_TIME3_REG, 0);
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+
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+ regmap_write(dphy->regs, SUN6I_DPHY_TX_TIME4_REG,
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+ SUN6I_DPHY_TX_TIME4_HS_TX_ANA0(3) |
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+ SUN6I_DPHY_TX_TIME4_HS_TX_ANA1(3));
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+
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+ dphy->variant->tx_power_on(dphy);
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regmap_update_bits(dphy->regs, SUN6I_DPHY_ANA3_REG,
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SUN6I_DPHY_ANA3_EN_VTTC |
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@@ -469,6 +479,7 @@ static int sun6i_dphy_probe(struct platf
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}
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static const struct sun6i_dphy_variant sun6i_a31_mipi_dphy_variant = {
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+ .tx_power_on = sun6i_a31_mipi_dphy_tx_power_on,
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.supports_rx = true,
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};
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