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fbbb4eb8b4
Hardware:
SoC: AR9344
CPU: 560 MHz
Flash: 8 MiB
RAM: 128 MiB
WiFi: Atheros AR9340 2.4GHz 802.11bgn
Atheros AR9300 5GHz 802.11an
Ethernet: AR934X built-in switch, WAN on separate physical interface
USB: 1x 2.0
Flash instruction (WebUI):
Download *-factory.bin image and upload it via the firmwary upgrade
function of the stock firmware WebUI.
Flash instruction (TFTP):
1. Set PC to fixed ip address 192.168.0.66
2. Download *-factory.bin image and rename it to
wdr3500v1_tp_recovery.bin
3. Start a tftp server with the image file in its root directory
4. Turn off the router
5. Press and hold Reset button
6. Turn on router with the reset button pressed and wait ~15 seconds
7. Release the reset button and after a short time
the firmware should be transferred from the tftp server
8. Wait ~30 second to complete recovery.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
[removed stray newline]
Signed-off-by: David Bauer <mail@david-bauer.net>
120 lines
2.0 KiB
Plaintext
120 lines
2.0 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "ar9344_tplink_tl-wdrxxxx.dtsi"
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&leds {
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usb1 {
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label = "tp-link:green:usb1";
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gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
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trigger-sources = <&hub_port1>;
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linux,default-trigger = "usbport";
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};
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usb2 {
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label = "tp-link:green:usb2";
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gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
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trigger-sources = <&hub_port2>;
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linux,default-trigger = "usbport";
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};
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};
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&gpio {
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lna0 {
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gpio-hog;
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gpios = <18 GPIO_ACTIVE_HIGH>;
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output-high;
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line-name = "tp-link:ext:lna0";
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};
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lna1 {
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gpio-hog;
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gpios = <19 GPIO_ACTIVE_HIGH>;
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output-high;
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line-name = "tp-link:ext:lna1";
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};
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usb1_power {
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gpio-hog;
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gpios = <22 GPIO_ACTIVE_HIGH>;
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output-high;
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line-name = "tp-link:power:usb1";
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};
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usb2_power {
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gpio-hog;
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gpios = <21 GPIO_ACTIVE_HIGH>;
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output-high;
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line-name = "tp-link:power:usb2";
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};
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};
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&usb {
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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port@1 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <1>;
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#trigger-source-cells = <0>;
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hub_port1: port@1 {
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reg = <1>;
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#trigger-source-cells = <0>;
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};
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hub_port2: port@2 {
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reg = <2>;
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#trigger-source-cells = <0>;
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};
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};
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};
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&usb_phy {
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status = "okay";
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};
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&ath9k {
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mtd-mac-address = <&uboot 0x1fc00>;
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};
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&wmac {
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mtd-mac-address = <&uboot 0x1fc00>;
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mtd-mac-address-increment = <(-1)>;
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};
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&mdio0 {
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status = "okay";
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phy-mask = <0>;
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phy0: ethernet-phy@0 {
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reg = <0>;
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phy-mode = "rgmii";
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qca,ar8327-initvals = <
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0x04 0x07600000 /* PORT0 PAD MODE CTRL */
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0x10 0x80000080 /* POWER_ON_STRIP */
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0x50 0xc737c737 /* LED_CTRL0 */
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0x54 0x00000000 /* LED_CTRL1 */
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0x58 0x00000000 /* LED_CTRL2 */
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0x5c 0x0030c300 /* LED_CTRL3 */
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0x7c 0x0000007e /* PORT0_STATUS */
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>;
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};
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};
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ð0 {
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status = "okay";
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/* default for ar934x, except for 1000M */
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pll-data = <0x06000000 0x00000101 0x00001616>;
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mtd-mac-address = <&uboot 0x1fc00>;
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mtd-mac-address-increment = <(-2)>;
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phy-mode = "rgmii";
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phy-handle = <&phy0>;
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};
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