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c95ed79787
Fix cacheinfo: Unable to detect cache hierarchy for CPU 0. Signed-off-by: Milinda Brantini <C_A_T_T_E_R_Y@outlook.com>
57 lines
2.0 KiB
Diff
57 lines
2.0 KiB
Diff
From patchwork Sat Nov 12 14:10:59 2022
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Content-Type: text/plain; charset="utf-8"
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MIME-Version: 1.0
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Content-Transfer-Encoding: 7bit
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X-Patchwork-Submitter: Aurelien Jarno <aurelien@aurel32.net>
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X-Patchwork-Id: 13041221
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From: Aurelien Jarno <aurelien@aurel32.net>
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To: Olivia Mackall <olivia@selenic.com>,
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Herbert Xu <herbert@gondor.apana.org.au>,
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Rob Herring <robh+dt@kernel.org>,
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Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
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Heiko Stuebner <heiko@sntech.de>,
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Philipp Zabel <p.zabel@pengutronix.de>,
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Lin Jinhan <troy.lin@rock-chips.com>
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Cc: linux-crypto@vger.kernel.org (open list:HARDWARE RANDOM NUMBER GENERATOR
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CORE),
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devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE
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BINDINGS),
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linux-arm-kernel@lists.infradead.org (moderated list:ARM/Rockchip SoC
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support),
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linux-rockchip@lists.infradead.org (open list:ARM/Rockchip SoC support),
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linux-kernel@vger.kernel.org (open list),
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Aurelien Jarno <aurelien@aurel32.net>
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Subject: [PATCH v1 3/3] arm64: dts: rockchip: add DT entry for RNG to RK356x
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Date: Sat, 12 Nov 2022 15:10:59 +0100
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Message-Id: <20221112141059.3802506-4-aurelien@aurel32.net>
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In-Reply-To: <20221112141059.3802506-1-aurelien@aurel32.net>
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References: <20221112141059.3802506-1-aurelien@aurel32.net>
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MIME-Version: 1.0
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List-Id: <linux-arm-kernel.lists.infradead.org>
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Enable the just added Rockchip RNG driver for RK356x SoCs.
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Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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---
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arch/arm64/boot/dts/rockchip/rk356x.dtsi | 9 +++++++++
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1 file changed, 9 insertions(+)
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--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
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+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
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@@ -1848,6 +1848,15 @@
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};
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};
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+ rng: rng@fe388000 {
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+ compatible = "rockchip,rk3568-rng";
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+ reg = <0x0 0xfe388000 0x0 0x4000>;
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+ clocks = <&cru CLK_TRNG_NS>, <&cru HCLK_TRNG_NS>;
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+ clock-names = "trng_clk", "trng_hclk";
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+ resets = <&cru SRST_TRNG_NS>;
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+ reset-names = "reset";
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+ };
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+
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pinctrl: pinctrl {
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compatible = "rockchip,rk3568-pinctrl";
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rockchip,grf = <&grf>;
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