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40 lines
1.4 KiB
Diff
40 lines
1.4 KiB
Diff
From bb8e6ca274763fa98613dbe8b0833348a1d8fe4d Mon Sep 17 00:00:00 2001
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From: Claudiu Beznea <claudiu.beznea@microchip.com>
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Date: Mon, 11 Oct 2021 14:27:12 +0300
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Subject: [PATCH 240/247] clk: at91: clk-master: check if div or pres is zero
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Check if div or pres is zero before using it as argument for ffs().
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In case div is zero ffs() will return 0 and thus substracting from
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zero will lead to invalid values to be setup in registers.
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Fixes: 7a110b9107ed8 ("clk: at91: clk-master: re-factor master clock")
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Fixes: 75c88143f3b87 ("clk: at91: clk-master: add master clock support for SAMA7G5")
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Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
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Link: https://lore.kernel.org/r/20211011112719.3951784-9-claudiu.beznea@microchip.com
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Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
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Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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---
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drivers/clk/at91/clk-master.c | 4 ++--
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1 file changed, 2 insertions(+), 2 deletions(-)
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--- a/drivers/clk/at91/clk-master.c
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+++ b/drivers/clk/at91/clk-master.c
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@@ -344,7 +344,7 @@ static int clk_master_pres_set_rate(stru
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else if (pres == 3)
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pres = MASTER_PRES_MAX;
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- else
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+ else if (pres)
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pres = ffs(pres) - 1;
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spin_lock_irqsave(master->lock, flags);
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@@ -757,7 +757,7 @@ static int clk_sama7g5_master_set_rate(s
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if (div == 3)
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div = MASTER_PRES_MAX;
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- else
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+ else if (div)
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div = ffs(div) - 1;
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spin_lock_irqsave(master->lock, flags);
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