INAGAKI Hiroshi 10a54e1442 ath79: fix pinmux reg value for QCA956x
The range of pinmux reg property "<0x1804002c 0x40>" for QCA956x SoC
does not includes GPIO_FUNCTION register.

If the device uses "&jtag_disable_pins", this causes the following
errors:

[    1.982937] pinctrl-single 1804002c.pinmux: mux offset out of range: 0x40 (0x40)
[    1.990622] pinctrl-single 1804002c.pinmux: could not add functions for pinmux_jtag_disable_pins 64x

Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
2018-12-24 19:18:07 +01:00
..
2018-08-08 08:11:11 +02:00
2018-12-12 12:28:26 +01:00
2018-08-08 08:11:11 +02:00
2018-08-08 08:11:11 +02:00
2018-08-08 08:11:11 +02:00
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2018-08-08 08:11:11 +02:00
2018-12-12 12:28:26 +01:00