openwrt/target/linux/ath79/dts/ar7161_trendnet_tew-673gru.dts
Korey Caro 1133a8f805 ath79: add support to TrendNet TEW-673GRU
Add support for the TrendNet TEW-673GRU to ath79.
This device was supported in 19.07.9 but was deprecated with ar71xx.
This is mostly a copy of D-Link DIR-825 B1.
Updates have been completed to enable factory.bin and sysupgrade.bin both.
Code improvements to DTS file and makefile.

Architecture   |  MIPS
Vendor         |  Qualcomm Atheros
bootloader     |  U-Boot
System-On-Chip |  AR7161 rev 2 (MIPS 24Kc V7.4)
CPU/Speed      |  24Kc V7.4 680 MHz
Flash-Chip     |  Macronix MX25L6405D
Flash size     |  8192 KiB
RAM Chip:      |  ProMOS V58C2256164SCI5 × 2
RAM size       |  64 MiB
Wireless       |  2 x Atheros AR922X 2.4GHz/5.0GHz 802.11abgn
Ethernet       |  RealTek RTL8366S Gigabit w/ port based vlan support
USB            |  Yes 2 x 2.0

Initial Flashing Process:
	1) Download 22.03 tew-673gru factory bin
	2) Flash 22.03 using TrendNet GUI

OpenWRT Upgrade Process
	3) Download 22.03 tew-673gru sysupgrade.bin
	4) Flash 22.03 using OpenWRT GUI

Signed-off-by: Korey Caro <korey.caro@gmail.com>
(cherry picked from commit 12cee86989)
2022-11-11 20:56:38 +01:00

181 lines
2.7 KiB
Plaintext

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "ar7100.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "trendnet,tew-673gru", "qca,ar7161";
model = "TRENDNET TEW-673GRU";
aliases {
led-boot = &led_wps;
led-failsafe = &led_wps;
led-running = &led_wps;
led-upgrade = &led_wps;
};
extosc: ref {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-output-names = "ref";
clock-frequency = <40000000>;
};
leds {
compatible = "gpio-leds";
led_wps: wps {
label = "blue:wps";
gpios = <&gpio 9 GPIO_ACTIVE_LOW>;
};
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
};
wps {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
};
};
rtl8366s {
compatible = "realtek,rtl8366s";
gpio-sda = <&gpio 5 GPIO_ACTIVE_HIGH>;
gpio-sck = <&gpio 7 GPIO_ACTIVE_HIGH>;
realtek,initvals = <0x06 0x0108>;
mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
phy4: ethernet-phy@4 {
reg = <4>;
phy-mode = "rgmii";
};
};
};
virtual_flash {
compatible = "mtd-concat";
devices = <&fwconcat0 &fwconcat1>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x0 0x0>;
};
};
};
};
&usb1 {
status = "okay";
};
&usb2 {
status = "okay";
};
&usb_phy {
status = "okay";
};
&pcie0 {
status = "okay";
wifi@0,11 {
compatible = "pci168c,0029";
reg = <0x8800 0 0 0 0>;
qca,no-eeprom;
};
wifi@0,12 {
compatible = "pci168c,0029";
reg = <0x9000 0 0 0 0>;
qca,no-eeprom;
};
};
&pll {
clocks = <&extosc>;
};
&spi {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x000000 0x040000>;
read-only;
};
partition@40000 {
label = "config";
reg = <0x040000 0x010000>;
read-only;
};
fwconcat0: partition@50000 {
label = "fwconcat0";
reg = <0x050000 0x610000>;
};
partition@660000 {
label = "caldata";
reg = <0x660000 0x010000>;
read-only;
};
fwconcat1: partition@670000 {
label = "fwconcat1";
reg = <0x670000 0x190000>;
};
};
};
};
&eth0 {
status = "okay";
pll-data = <0x11110000 0x00001099 0x00991099>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
&eth1 {
status = "okay";
pll-data = <0x11110000 0x00001099 0x00991099>;
phy-handle = <&phy4>;
};