openwrt/target/linux/layerscape/patches-4.4/1111-mtd-spi-nor-disable-4kb-sector-erase-for-s25fl128.patch
Koen Vandeputte 65044a50ab kernel: bump 4.4 to 4.4.167
Refreshed all patches.

Removed upstreamed:
- 203-MIPS-ath79-fix-restart.patch
- 330-Revert-MIPS-BCM47XX-Enable-74K-Core-ExternalSync-for.patch
- 051-0001-ovl-rename-is_merge-to-is_lowest.patch
- 051-0002-ovl-override-creds-with-the-ones-from-the-superblock.patch
- 051-0005-ovl-proper-cleanup-of-workdir.patch

Altered patches:
- 201-extra_optimization.patch
- 304-mips_disable_fpu.patch

Compile-tested on: ar71xx, cns3xxx, imx6, mpc85xx
Runtime-tested on: ar71xx, cns3xxx, imx6, mpc85xx

Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
2018-12-18 15:14:39 +01:00

28 lines
1.4 KiB
Diff

From 30d34abc80b0a602a1327bdfbddd42d250887049 Mon Sep 17 00:00:00 2001
From: Yutang Jiang <yutang.jiang@nxp.com>
Date: Fri, 9 Sep 2016 22:56:12 +0800
Subject: [PATCH 111/113] mtd: spi-nor: disable 4kb sector erase for s25fl128
As for s25fl128s flash, the sectors are organized either as a hybrid
combination of 4-kB and 64-kB sectors, or as uniform 256-kbyte sectors.
we should use the command 0xd8 to erase all bits, not the Parameter 4-kB
Sector Erase (P4E) command 0x20.
Signed-off-by: Yunhui Cui <yunhui.cui@nxp.com>
Integrated-by: Yutang Jiang <yutang.jiang@nxp.com>
---
drivers/mtd/spi-nor/spi-nor.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -810,7 +810,7 @@ static const struct flash_info spi_nor_i
{ "s70fl01gs", INFO(0x010221, 0x4d00, 256 * 1024, 256, 0) },
{ "s25sl12800", INFO(0x012018, 0x0300, 256 * 1024, 64, 0) },
{ "s25sl12801", INFO(0x012018, 0x0301, 64 * 1024, 256, 0) },
- { "s25fl128s", INFO6(0x012018, 0x4d0180, 64 * 1024, 256, SECT_4K | SPI_NOR_QUAD_READ
+ { "s25fl128s", INFO6(0x012018, 0x4d0180, 64 * 1024, 256, SPI_NOR_QUAD_READ
| SPI_NOR_DDR_QUAD_READ) },
{ "s25fl129p0", INFO(0x012018, 0x4d00, 256 * 1024, 64, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
{ "s25fl129p1", INFO(0x012018, 0x4d01, 64 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },