mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-21 22:47:56 +00:00
69d323f231
This is a backport of the patches accepted to the Linux mainline related to mvebu SoC (Armada XP and Armada 370) between Linux v3.10, and Linux v3.11. This work mainly covers: * Enabling USB storage, and PCI to mvebu_defconfig. * Add support for NOR flash. * Some PCI device tree related updates, and bus parsing. * Adding Armada XP & 370 PCI driver, and update some clock gating specifics. * Introduce Marvell EBU Device Bus driver. * Enaling USB in the armada*.dts. * Enabling, and updating the mvebu-mbus. * Some SATA and Ethernet related fixes. Signed-off-by: Seif Mazareeb <seif.mazareeb@gmail.com> CC: Luka Perkov <luka@openwrt.org> SVN-Revision: 39564
84 lines
2.6 KiB
Diff
84 lines
2.6 KiB
Diff
From e4123095febc94c547c0459db752e7879db79d76 Mon Sep 17 00:00:00 2001
|
|
From: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
|
|
Date: Tue, 21 May 2013 10:48:54 -0300
|
|
Subject: [PATCH 044/203] bus: mvebu-mbus: Introduce device tree binding
|
|
|
|
This patch adds the most fundamental device-tree initialization.
|
|
We only introduce what's required to be able to probe the mvebu-mbus
|
|
driver from the DT. Follow-up patches will extend the device tree binding,
|
|
allowing to describe static address decoding windows.
|
|
|
|
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
|
|
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
|
|
Tested-by: Andrew Lunn <andrew@lunn.ch>
|
|
Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
|
|
---
|
|
drivers/bus/mvebu-mbus.c | 49 ++++++++++++++++++++++++++++++++++++++++++++++++
|
|
include/linux/mbus.h | 1 +
|
|
2 files changed, 50 insertions(+)
|
|
|
|
--- a/drivers/bus/mvebu-mbus.c
|
|
+++ b/drivers/bus/mvebu-mbus.c
|
|
@@ -900,3 +900,52 @@ int __init mvebu_mbus_init(const char *s
|
|
sdramwins_phys_base,
|
|
sdramwins_size);
|
|
}
|
|
+
|
|
+#ifdef CONFIG_OF
|
|
+int __init mvebu_mbus_dt_init(void)
|
|
+{
|
|
+ struct resource mbuswins_res, sdramwins_res;
|
|
+ struct device_node *np, *controller;
|
|
+ const struct of_device_id *of_id;
|
|
+ const __be32 *prop;
|
|
+ int ret;
|
|
+
|
|
+ np = of_find_matching_node(NULL, of_mvebu_mbus_ids);
|
|
+ if (!np) {
|
|
+ pr_err("could not find a matching SoC family\n");
|
|
+ return -ENODEV;
|
|
+ }
|
|
+
|
|
+ of_id = of_match_node(of_mvebu_mbus_ids, np);
|
|
+ mbus_state.soc = of_id->data;
|
|
+
|
|
+ prop = of_get_property(np, "controller", NULL);
|
|
+ if (!prop) {
|
|
+ pr_err("required 'controller' property missing\n");
|
|
+ return -EINVAL;
|
|
+ }
|
|
+
|
|
+ controller = of_find_node_by_phandle(be32_to_cpup(prop));
|
|
+ if (!controller) {
|
|
+ pr_err("could not find an 'mbus-controller' node\n");
|
|
+ return -ENODEV;
|
|
+ }
|
|
+
|
|
+ if (of_address_to_resource(controller, 0, &mbuswins_res)) {
|
|
+ pr_err("cannot get MBUS register address\n");
|
|
+ return -EINVAL;
|
|
+ }
|
|
+
|
|
+ if (of_address_to_resource(controller, 1, &sdramwins_res)) {
|
|
+ pr_err("cannot get SDRAM register address\n");
|
|
+ return -EINVAL;
|
|
+ }
|
|
+
|
|
+ ret = mvebu_mbus_common_init(&mbus_state,
|
|
+ mbuswins_res.start,
|
|
+ resource_size(&mbuswins_res),
|
|
+ sdramwins_res.start,
|
|
+ resource_size(&sdramwins_res));
|
|
+ return ret;
|
|
+}
|
|
+#endif
|
|
--- a/include/linux/mbus.h
|
|
+++ b/include/linux/mbus.h
|
|
@@ -74,5 +74,6 @@ int mvebu_mbus_del_window(phys_addr_t ba
|
|
int mvebu_mbus_init(const char *soc, phys_addr_t mbus_phys_base,
|
|
size_t mbus_size, phys_addr_t sdram_phys_base,
|
|
size_t sdram_size);
|
|
+int mvebu_mbus_dt_init(void);
|
|
|
|
#endif /* __LINUX_MBUS_H */
|