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https://github.com/openwrt/openwrt.git
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19bd5436c7
Easier to just use devm_platform_ioremap_resource. Signed-off-by: Rosen Penev <rosenp@gmail.com> Link: https://github.com/openwrt/openwrt/pull/16701 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
484 lines
13 KiB
C
484 lines
13 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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#include <linux/module.h>
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#include <linux/of_platform.h>
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#include "i2c-rtl9300.h"
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#define REG(i, x) (i->base + x + (i->scl_num ? i->mst2_offset : 0))
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#define REG_MASK(i, clear, set, reg) \
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writel((readl(REG(i, reg)) & ~(clear)) | (set), REG(i, reg))
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struct i2c_drv_data {
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int scl0_pin;
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int scl1_pin;
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int sda0_pin;
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struct i2c_algorithm *algo;
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int (*read)(struct rtl9300_i2c *i2c, u8 *buf, int len);
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int (*write)(struct rtl9300_i2c *i2c, u8 *buf, int len);
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void (*reg_addr_set)(struct rtl9300_i2c *i2c, u32 reg, u16 len);
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int (*config_xfer)(struct rtl9300_i2c *i2c, u16 addr, u16 len);
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int (*execute_xfer)(struct rtl9300_i2c *i2c, char read_write, int size,
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union i2c_smbus_data * data, int len);
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void (*writel)(struct rtl9300_i2c *i2c, u32 data);
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void (*config_io)(struct rtl9300_i2c *i2c, int scl_num, int sda_num);
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u32 mst2_offset;
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};
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DEFINE_MUTEX(i2c_lock);
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static void rtl9300_i2c_reg_addr_set(struct rtl9300_i2c *i2c, u32 reg, u16 len)
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{
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/* Set register address width */
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REG_MASK(i2c, 0x3 << RTL9300_I2C_CTRL2_MADDR_WIDTH, len << RTL9300_I2C_CTRL2_MADDR_WIDTH,
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RTL9300_I2C_CTRL2);
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/* Set register address */
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REG_MASK(i2c, 0xffffff << RTL9300_I2C_CTRL1_MEM_ADDR, reg << RTL9300_I2C_CTRL1_MEM_ADDR,
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RTL9300_I2C_CTRL1);
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}
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static void rtl9310_i2c_reg_addr_set(struct rtl9300_i2c *i2c, u32 reg, u16 len)
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{
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/* Set register address width */
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REG_MASK(i2c, 0x3 << RTL9310_I2C_CTRL_MADDR_WIDTH, len << RTL9310_I2C_CTRL_MADDR_WIDTH,
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RTL9310_I2C_CTRL);
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/* Set register address */
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writel(reg, REG(i2c, RTL9310_I2C_MEMADDR));
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}
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static void rtl9300_i2c_config_io(struct rtl9300_i2c *i2c, int scl_num, int sda_num)
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{
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u32 v;
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/* Set SCL pin */
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REG_MASK(i2c, 0, BIT(RTL9300_I2C_CTRL1_GPIO8_SCL_SEL), RTL9300_I2C_CTRL1);
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/* Set SDA pin */
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REG_MASK(i2c, 0x7 << RTL9300_I2C_CTRL1_SDA_OUT_SEL,
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i2c->sda_num << RTL9300_I2C_CTRL1_SDA_OUT_SEL, RTL9300_I2C_CTRL1);
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/* Set SDA pin to I2C functionality */
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v = readl(i2c->base + RTL9300_I2C_MST_GLB_CTRL);
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v |= BIT(i2c->sda_num);
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writel(v, i2c->base + RTL9300_I2C_MST_GLB_CTRL);
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}
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static void rtl9310_i2c_config_io(struct rtl9300_i2c *i2c, int scl_num, int sda_num)
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{
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u32 v;
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/* Set SCL pin */
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REG_MASK(i2c, 0, BIT(RTL9310_I2C_MST_IF_SEL_GPIO_SCL_SEL + scl_num), RTL9310_I2C_MST_IF_SEL);
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/* Set SDA pin */
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REG_MASK(i2c, 0x7 << RTL9310_I2C_CTRL_SDA_OUT_SEL,
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i2c->sda_num << RTL9310_I2C_CTRL_SDA_OUT_SEL, RTL9310_I2C_CTRL);
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/* Set SDA pin to I2C functionality */
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v = readl(i2c->base + RTL9310_I2C_MST_IF_SEL);
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v |= BIT(i2c->sda_num);
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writel(v, i2c->base + RTL9310_I2C_MST_IF_SEL);
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}
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static int rtl9300_i2c_config_xfer(struct rtl9300_i2c *i2c, u16 addr, u16 len)
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{
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/* Set bus frequency */
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REG_MASK(i2c, 0x3 << RTL9300_I2C_CTRL2_SCL_FREQ,
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i2c->bus_freq << RTL9300_I2C_CTRL2_SCL_FREQ, RTL9300_I2C_CTRL2);
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/* Set slave device address */
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REG_MASK(i2c, 0x7f << RTL9300_I2C_CTRL2_DEV_ADDR,
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addr << RTL9300_I2C_CTRL2_DEV_ADDR, RTL9300_I2C_CTRL2);
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/* Set data length */
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REG_MASK(i2c, 0xf << RTL9300_I2C_CTRL2_DATA_WIDTH,
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((len - 1) & 0xf) << RTL9300_I2C_CTRL2_DATA_WIDTH, RTL9300_I2C_CTRL2);
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/* Set read mode to random */
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REG_MASK(i2c, 0x1 << RTL9300_I2C_CTRL2_READ_MODE, 0, RTL9300_I2C_CTRL2);
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return 0;
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}
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static int rtl9310_i2c_config_xfer(struct rtl9300_i2c *i2c, u16 addr, u16 len)
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{
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/* Set bus frequency */
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REG_MASK(i2c, 0x3 << RTL9310_I2C_CTRL_SCL_FREQ,
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i2c->bus_freq << RTL9310_I2C_CTRL_SCL_FREQ, RTL9310_I2C_CTRL);
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/* Set slave device address */
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REG_MASK(i2c, 0x7f << RTL9310_I2C_CTRL_DEV_ADDR,
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addr << RTL9310_I2C_CTRL_DEV_ADDR, RTL9310_I2C_CTRL);
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/* Set data length */
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REG_MASK(i2c, 0xf << RTL9310_I2C_CTRL_DATA_WIDTH,
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((len - 1) & 0xf) << RTL9310_I2C_CTRL_DATA_WIDTH, RTL9310_I2C_CTRL);
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/* Set read mode to random */
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REG_MASK(i2c, 0x1 << RTL9310_I2C_CTRL_READ_MODE, 0, RTL9310_I2C_CTRL);
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return 0;
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}
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static int i2c_read(void __iomem *r0, u8 *buf, int len)
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{
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if (len > 16)
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return -EIO;
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for (int i = 0; i < len; i++) {
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u32 v;
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if (i % 4 == 0)
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v = readl(r0 + i);
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buf[i] = v;
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v >>= 8;
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}
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return len;
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}
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static int i2c_write(void __iomem *r0, u8 *buf, int len)
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{
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if (len > 16)
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return -EIO;
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for (int i = 0; i < len; i++) {
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u32 v;
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if (! (i % 4))
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v = 0;
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v <<= 8;
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v |= buf[i];
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if (i % 4 == 3 || i == len - 1)
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writel(v, r0 + (i / 4) * 4);
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}
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return len;
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}
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static int rtl9300_i2c_read(struct rtl9300_i2c *i2c, u8 *buf, int len)
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{
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return i2c_read(REG(i2c, RTL9300_I2C_DATA_WORD0), buf, len);
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}
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static int rtl9300_i2c_write(struct rtl9300_i2c *i2c, u8 *buf, int len)
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{
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return i2c_write(REG(i2c, RTL9300_I2C_DATA_WORD0), buf, len);
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}
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static int rtl9310_i2c_read(struct rtl9300_i2c *i2c, u8 *buf, int len)
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{
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return i2c_read(REG(i2c, RTL9310_I2C_DATA), buf, len);
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}
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static int rtl9310_i2c_write(struct rtl9300_i2c *i2c, u8 *buf, int len)
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{
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return i2c_write(REG(i2c, RTL9310_I2C_DATA), buf, len);
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}
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static void rtl9300_writel(struct rtl9300_i2c *i2c, u32 data)
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{
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writel(data, REG(i2c, RTL9300_I2C_DATA_WORD0));
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}
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static void rtl9310_writel(struct rtl9300_i2c *i2c, u32 data)
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{
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writel(data, REG(i2c, RTL9310_I2C_DATA));
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}
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static int rtl9300_execute_xfer(struct rtl9300_i2c *i2c, char read_write,
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int size, union i2c_smbus_data * data, int len)
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{
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u32 v;
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if (read_write == I2C_SMBUS_READ)
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REG_MASK(i2c, BIT(RTL9300_I2C_CTRL1_RWOP), 0, RTL9300_I2C_CTRL1);
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else
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REG_MASK(i2c, 0, BIT(RTL9300_I2C_CTRL1_RWOP), RTL9300_I2C_CTRL1);
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REG_MASK(i2c, 0, BIT(RTL9300_I2C_CTRL1_I2C_TRIG), RTL9300_I2C_CTRL1);
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do {
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v = readl(REG(i2c, RTL9300_I2C_CTRL1));
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} while (v & BIT(RTL9300_I2C_CTRL1_I2C_TRIG));
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if (v & BIT(RTL9300_I2C_CTRL1_I2C_FAIL))
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return -EIO;
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if (read_write == I2C_SMBUS_READ) {
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if (size == I2C_SMBUS_BYTE || size == I2C_SMBUS_BYTE_DATA){
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data->byte = readl(REG(i2c, RTL9300_I2C_DATA_WORD0));
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} else if (size == I2C_SMBUS_WORD_DATA) {
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data->word = readl(REG(i2c, RTL9300_I2C_DATA_WORD0));
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} else if (len > 0) {
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rtl9300_i2c_read(i2c, &data->block[0], len);
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}
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}
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return 0;
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}
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static int rtl9310_execute_xfer(struct rtl9300_i2c *i2c, char read_write,
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int size, union i2c_smbus_data * data, int len)
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{
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u32 v;
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if (read_write == I2C_SMBUS_READ)
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REG_MASK(i2c, BIT(RTL9310_I2C_CTRL_RWOP), 0, RTL9310_I2C_CTRL);
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else
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REG_MASK(i2c, 0, BIT(RTL9310_I2C_CTRL_RWOP), RTL9310_I2C_CTRL);
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REG_MASK(i2c, 0, BIT(RTL9310_I2C_CTRL_I2C_TRIG), RTL9310_I2C_CTRL);
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do {
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v = readl(REG(i2c, RTL9310_I2C_CTRL));
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} while (v & BIT(RTL9310_I2C_CTRL_I2C_TRIG));
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if (v & BIT(RTL9310_I2C_CTRL_I2C_FAIL))
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return -EIO;
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if (read_write == I2C_SMBUS_READ) {
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if (size == I2C_SMBUS_BYTE || size == I2C_SMBUS_BYTE_DATA){
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data->byte = readl(REG(i2c, RTL9310_I2C_DATA));
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} else if (size == I2C_SMBUS_WORD_DATA) {
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data->word = readl(REG(i2c, RTL9310_I2C_DATA));
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} else if (len > 0) {
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rtl9310_i2c_read(i2c, &data->block[0], len);
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}
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}
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return 0;
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}
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static int rtl9300_i2c_smbus_xfer(struct i2c_adapter * adap, u16 addr,
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unsigned short flags, char read_write,
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u8 command, int size, union i2c_smbus_data * data)
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{
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struct rtl9300_i2c *i2c = i2c_get_adapdata(adap);
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struct i2c_drv_data *drv_data = (struct i2c_drv_data *)device_get_match_data(i2c->dev);
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int len = 0, ret;
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mutex_lock(&i2c_lock);
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switch (size) {
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case I2C_SMBUS_QUICK:
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drv_data->config_xfer(i2c, addr, 0);
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drv_data->reg_addr_set(i2c, 0, 0);
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break;
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case I2C_SMBUS_BYTE:
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if (read_write == I2C_SMBUS_WRITE) {
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drv_data->config_xfer(i2c, addr, 0);
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drv_data->reg_addr_set(i2c, command, 1);
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} else {
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drv_data->config_xfer(i2c, addr, 1);
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drv_data->reg_addr_set(i2c, 0, 0);
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}
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break;
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case I2C_SMBUS_BYTE_DATA:
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pr_debug("I2C_SMBUS_BYTE_DATA %02x, read %d cmd %02x\n", addr, read_write, command);
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drv_data->reg_addr_set(i2c, command, 1);
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drv_data->config_xfer(i2c, addr, 1);
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if (read_write == I2C_SMBUS_WRITE) {
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pr_debug("--> data %02x\n", data->byte);
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drv_data->writel(i2c, data->byte);
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}
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break;
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case I2C_SMBUS_WORD_DATA:
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pr_debug("I2C_SMBUS_WORD %02x, read %d\n", addr, read_write);
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drv_data->reg_addr_set(i2c, command, 1);
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drv_data->config_xfer(i2c, addr, 2);
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if (read_write == I2C_SMBUS_WRITE)
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drv_data->writel(i2c, data->word);
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break;
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case I2C_SMBUS_BLOCK_DATA:
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pr_debug("I2C_SMBUS_BLOCK_DATA %02x, read %d, len %d\n",
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addr, read_write, data->block[0]);
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drv_data->reg_addr_set(i2c, command, 1);
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drv_data->config_xfer(i2c, addr, data->block[0]);
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if (read_write == I2C_SMBUS_WRITE)
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drv_data->write(i2c, &data->block[1], data->block[0]);
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len = data->block[0];
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break;
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default:
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dev_warn(&adap->dev, "Unsupported transaction %d\n", size);
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return -EOPNOTSUPP;
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}
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ret = drv_data->execute_xfer(i2c, read_write, size, data, len);
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mutex_unlock(&i2c_lock);
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return ret;
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}
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static u32 rtl9300_i2c_func(struct i2c_adapter *a)
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{
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return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
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I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
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I2C_FUNC_SMBUS_BLOCK_DATA;
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}
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static const struct i2c_algorithm rtl9300_i2c_algo = {
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.smbus_xfer = rtl9300_i2c_smbus_xfer,
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.functionality = rtl9300_i2c_func,
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};
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struct i2c_adapter_quirks rtl9300_i2c_quirks = {
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.flags = I2C_AQ_NO_CLK_STRETCH,
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.max_read_len = 16,
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.max_write_len = 16,
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};
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static int rtl9300_i2c_probe(struct platform_device *pdev)
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{
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struct rtl9300_i2c *i2c;
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struct i2c_adapter *adap;
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struct i2c_drv_data *drv_data;
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struct device_node *node = pdev->dev.of_node;
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u32 clock_freq, pin;
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int ret = 0;
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pr_info("%s probing I2C adapter\n", __func__);
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if (!node) {
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dev_err(i2c->dev, "No DT found\n");
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return -EINVAL;
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}
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drv_data = (struct i2c_drv_data *) device_get_match_data(&pdev->dev);
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i2c = devm_kzalloc(&pdev->dev, sizeof(struct rtl9300_i2c), GFP_KERNEL);
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if (!i2c)
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return -ENOMEM;
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i2c->base = devm_platform_ioremap_resource(pdev, 0);
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i2c->mst2_offset = drv_data->mst2_offset;
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if (IS_ERR(i2c->base))
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return PTR_ERR(i2c->base);
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pr_debug("%s base memory %08x\n", __func__, (u32)i2c->base);
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i2c->dev = &pdev->dev;
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if (of_property_read_u32(node, "clock-frequency", &clock_freq)) {
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clock_freq = I2C_MAX_STANDARD_MODE_FREQ;
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}
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switch(clock_freq) {
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case I2C_MAX_STANDARD_MODE_FREQ:
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i2c->bus_freq = RTL9300_I2C_STD_FREQ;
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break;
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case I2C_MAX_FAST_MODE_FREQ:
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i2c->bus_freq = RTL9300_I2C_FAST_FREQ;
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break;
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default:
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dev_warn(i2c->dev, "clock-frequency %d not supported\n", clock_freq);
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return -EINVAL;
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}
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dev_info(&pdev->dev, "SCL speed %d, mode is %d\n", clock_freq, i2c->bus_freq);
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if (of_property_read_u32(node, "scl-pin", &pin)) {
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dev_warn(i2c->dev, "SCL pin not found in DT, using default\n");
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pin = drv_data->scl0_pin;
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}
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if (!(pin == drv_data->scl0_pin || pin == drv_data->scl1_pin)) {
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dev_warn(i2c->dev, "SCL pin %d not supported\n", pin);
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return -EINVAL;
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}
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i2c->scl_num = pin == drv_data->scl0_pin ? 0 : 1;
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pr_info("%s scl_num %d\n", __func__, i2c->scl_num);
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if (of_property_read_u32(node, "sda-pin", &pin)) {
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dev_warn(i2c->dev, "SDA pin not found in DT, using default \n");
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pin = drv_data->sda0_pin;
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}
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i2c->sda_num = pin - drv_data->sda0_pin;
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if (i2c->sda_num < 0 || i2c->sda_num > 7) {
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dev_warn(i2c->dev, "SDA pin %d not supported\n", pin);
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return -EINVAL;
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}
|
|
pr_info("%s sda_num %d\n", __func__, i2c->sda_num);
|
|
|
|
adap = &i2c->adap;
|
|
adap->owner = THIS_MODULE;
|
|
adap->algo = &rtl9300_i2c_algo;
|
|
adap->retries = 3;
|
|
adap->dev.parent = &pdev->dev;
|
|
i2c_set_adapdata(adap, i2c);
|
|
adap->dev.of_node = node;
|
|
strlcpy(adap->name, dev_name(&pdev->dev), sizeof(adap->name));
|
|
|
|
platform_set_drvdata(pdev, i2c);
|
|
|
|
drv_data->config_io(i2c, i2c->scl_num, i2c->sda_num);
|
|
|
|
ret = i2c_add_adapter(adap);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int rtl9300_i2c_remove(struct platform_device *pdev)
|
|
{
|
|
struct rtl9300_i2c *i2c = platform_get_drvdata(pdev);
|
|
|
|
i2c_del_adapter(&i2c->adap);
|
|
|
|
return 0;
|
|
}
|
|
|
|
struct i2c_drv_data rtl9300_i2c_drv_data = {
|
|
.scl0_pin = 8,
|
|
.scl1_pin = 17,
|
|
.sda0_pin = 9,
|
|
.read = rtl9300_i2c_read,
|
|
.read = rtl9300_i2c_write,
|
|
.reg_addr_set = rtl9300_i2c_reg_addr_set,
|
|
.config_xfer = rtl9300_i2c_config_xfer,
|
|
.execute_xfer = rtl9300_execute_xfer,
|
|
.writel = rtl9300_writel,
|
|
.config_io = rtl9300_i2c_config_io,
|
|
.mst2_offset = 0x1c,
|
|
};
|
|
|
|
struct i2c_drv_data rtl9310_i2c_drv_data = {
|
|
.scl0_pin = 13,
|
|
.scl1_pin = 14,
|
|
.sda0_pin = 0,
|
|
.read = rtl9310_i2c_read,
|
|
.read = rtl9310_i2c_write,
|
|
.reg_addr_set = rtl9310_i2c_reg_addr_set,
|
|
.config_xfer = rtl9310_i2c_config_xfer,
|
|
.execute_xfer = rtl9310_execute_xfer,
|
|
.writel = rtl9310_writel,
|
|
.config_io = rtl9310_i2c_config_io,
|
|
.mst2_offset = 0x18,
|
|
};
|
|
|
|
static const struct of_device_id i2c_rtl9300_dt_ids[] = {
|
|
{ .compatible = "realtek,rtl9300-i2c", .data = (void *) &rtl9300_i2c_drv_data },
|
|
{ .compatible = "realtek,rtl9310-i2c", .data = (void *) &rtl9310_i2c_drv_data },
|
|
{ /* sentinel */ }
|
|
};
|
|
MODULE_DEVICE_TABLE(of, rtl838x_eth_of_ids);
|
|
|
|
static struct platform_driver rtl9300_i2c_driver = {
|
|
.probe = rtl9300_i2c_probe,
|
|
.remove = rtl9300_i2c_remove,
|
|
.driver = {
|
|
.name = "i2c-rtl9300",
|
|
.pm = NULL,
|
|
.of_match_table = i2c_rtl9300_dt_ids,
|
|
},
|
|
};
|
|
|
|
module_platform_driver(rtl9300_i2c_driver);
|
|
|
|
MODULE_AUTHOR("Birger Koblitz");
|
|
MODULE_DESCRIPTION("RTL9300 I2C host driver");
|
|
MODULE_LICENSE("GPL v2");
|