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Backport lots upstream changes, many of them fixes, for the mt7530 DSA driver, similar to how it was done for Linux 6.1 in the previous commit. The remaining differences compared to the upstream driver are only the 'slave' -> 'user', 'master' -> 'conduit' language change in DSA and the rename of 'struct ethtool_eee' to 'struct ethtool_keee' as well as tree-wide replacement of ethtool_sprintf with ethtool_puts, all of them do not have any functional impact. Apart from some minor bug fixes and style improvements the switch should now behave more conformant when it comes to link-local frames, and we will again be able to cleanly pick patches from upstream. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
95 lines
3.0 KiB
Diff
95 lines
3.0 KiB
Diff
From de16cf680331cd0bd7db97c3f8d376f5eac39cae Mon Sep 17 00:00:00 2001
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From: Justin Swartz <justin.swartz@risingedge.co.za>
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Date: Tue, 5 Mar 2024 06:39:51 +0200
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Subject: [PATCH 28/30] net: dsa: mt7530: disable LEDs before reset
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Disable LEDs just before resetting the MT7530 to avoid
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situations where the ESW_P4_LED_0 and ESW_P3_LED_0 pin
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states may cause an unintended external crystal frequency
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to be selected.
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The HT_XTAL_FSEL (External Crystal Frequency Selection)
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field of HWTRAP (the Hardware Trap register) stores a
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2-bit value that represents the state of the ESW_P4_LED_0
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and ESW_P4_LED_0 pins (seemingly) sampled just after the
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MT7530 has been reset, as:
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ESW_P4_LED_0 ESW_P3_LED_0 Frequency
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-----------------------------------------
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0 1 20MHz
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1 0 40MHz
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1 1 25MHz
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The value of HT_XTAL_FSEL is bootstrapped by pulling
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ESW_P4_LED_0 and ESW_P3_LED_0 up or down accordingly,
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but:
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if a 40MHz crystal has been selected and
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the ESW_P3_LED_0 pin is high during reset,
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or a 20MHz crystal has been selected and
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the ESW_P4_LED_0 pin is high during reset,
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then the value of HT_XTAL_FSEL will indicate
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that a 25MHz crystal is present.
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By default, the state of the LED pins is PHY controlled
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to reflect the link state.
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To illustrate, if a board has:
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5 ports with active low LED control,
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and HT_XTAL_FSEL bootstrapped for 40MHz.
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When the MT7530 is powered up without any external
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connection, only the LED associated with Port 3 is
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illuminated as ESW_P3_LED_0 is low.
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In this state, directly after mt7530_setup()'s reset
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is performed, the HWTRAP register (0x7800) reflects
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the intended HT_XTAL_FSEL (HWTRAP bits 10:9) of 40MHz:
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mt7530-mdio mdio-bus:1f: mt7530_read: 00007800 == 00007dcf
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>>> bin(0x7dcf >> 9 & 0b11)
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'0b10'
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But if a cable is connected to Port 3 and the link
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is active before mt7530_setup()'s reset takes place,
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then HT_XTAL_FSEL seems to be set for 25MHz:
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mt7530-mdio mdio-bus:1f: mt7530_read: 00007800 == 00007fcf
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>>> bin(0x7fcf >> 9 & 0b11)
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'0b11'
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Once HT_XTAL_FSEL reflects 25MHz, none of the ports
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are functional until the MT7621 (or MT7530 itself)
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is reset.
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By disabling the LED pins just before reset, the chance
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of an unintended HT_XTAL_FSEL value is reduced.
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Signed-off-by: Justin Swartz <justin.swartz@risingedge.co.za>
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Link: https://lore.kernel.org/r/20240305043952.21590-1-justin.swartz@risingedge.co.za
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Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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---
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drivers/net/dsa/mt7530.c | 6 ++++++
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1 file changed, 6 insertions(+)
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--- a/drivers/net/dsa/mt7530.c
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+++ b/drivers/net/dsa/mt7530.c
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@@ -2228,6 +2228,12 @@ mt7530_setup(struct dsa_switch *ds)
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}
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}
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+ /* Disable LEDs before reset to prevent the MT7530 sampling a
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+ * potentially incorrect HT_XTAL_FSEL value.
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+ */
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+ mt7530_write(priv, MT7530_LED_EN, 0);
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+ usleep_range(1000, 1100);
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+
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/* Reset whole chip through gpio pin or memory-mapped registers for
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* different type of hardware
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*/
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