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4354b34f6f
Backport lots upstream changes, many of them fixes, for the mt7530 DSA driver, similar to how it was done for Linux 6.1 in the previous commit. The remaining differences compared to the upstream driver are only the 'slave' -> 'user', 'master' -> 'conduit' language change in DSA and the rename of 'struct ethtool_eee' to 'struct ethtool_keee' as well as tree-wide replacement of ethtool_sprintf with ethtool_puts, all of them do not have any functional impact. Apart from some minor bug fixes and style improvements the switch should now behave more conformant when it comes to link-local frames, and we will again be able to cleanly pick patches from upstream. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
134 lines
4.5 KiB
Diff
134 lines
4.5 KiB
Diff
From c91b7fb8fbb2e18ebb497e67f4252cec78e3a29b Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com>
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Date: Mon, 22 Jan 2024 08:35:55 +0300
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Subject: [PATCH 08/30] net: dsa: mt7530: improve comments regarding switch
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ports
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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There's no logic to numerically order the CPU ports. Just state the port
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number instead.
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Remove the irrelevant PHY muxing information from
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mt7530_mac_port_get_caps(). Explain the supported MII modes instead.
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Remove the out of place PHY muxing information from
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mt753x_phylink_mac_config(). The function is for MT7530, MT7531, and the
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switch on the MT7988 SoC but there's no PHY muxing on MT7531 or the switch
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on the MT7988 SoC.
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These comments were gradually introduced with the commits below.
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commit ca366d6c889b ("net: dsa: mt7530: Convert to PHYLINK API")
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commit 38f790a80560 ("net: dsa: mt7530: Add support for port 5")
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commit 88bdef8be9f6 ("net: dsa: mt7530: Extend device data ready for adding
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a new hardware")
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commit c288575f7810 ("net: dsa: mt7530: Add the support of MT7531 switch")
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Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
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Acked-by: Daniel Golle <daniel@makrotopia.org>
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Reviewed-by: Andrew Lunn <andrew@lunn.ch>
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Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
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Link: https://lore.kernel.org/r/20240122-for-netnext-mt7530-improvements-1-v3-4-042401f2b279@arinc9.com
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Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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---
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drivers/net/dsa/mt7530.c | 30 ++++++++++++++++++++----------
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1 file changed, 20 insertions(+), 10 deletions(-)
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--- a/drivers/net/dsa/mt7530.c
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+++ b/drivers/net/dsa/mt7530.c
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@@ -2574,12 +2574,14 @@ static void mt7530_mac_port_get_caps(str
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struct phylink_config *config)
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{
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switch (port) {
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- case 0 ... 4: /* Internal phy */
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+ /* Ports which are connected to switch PHYs. There is no MII pinout. */
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+ case 0 ... 4:
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__set_bit(PHY_INTERFACE_MODE_GMII,
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config->supported_interfaces);
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break;
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- case 5: /* 2nd cpu port with phy of port 0 or 4 / external phy */
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+ /* Port 5 supports rgmii with delays, mii, and gmii. */
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+ case 5:
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phy_interface_set_rgmii(config->supported_interfaces);
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__set_bit(PHY_INTERFACE_MODE_MII,
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config->supported_interfaces);
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@@ -2587,7 +2589,8 @@ static void mt7530_mac_port_get_caps(str
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config->supported_interfaces);
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break;
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- case 6: /* 1st cpu port */
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+ /* Port 6 supports rgmii and trgmii. */
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+ case 6:
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__set_bit(PHY_INTERFACE_MODE_RGMII,
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config->supported_interfaces);
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__set_bit(PHY_INTERFACE_MODE_TRGMII,
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@@ -2602,19 +2605,24 @@ static void mt7531_mac_port_get_caps(str
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struct mt7530_priv *priv = ds->priv;
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switch (port) {
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- case 0 ... 4: /* Internal phy */
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+ /* Ports which are connected to switch PHYs. There is no MII pinout. */
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+ case 0 ... 4:
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__set_bit(PHY_INTERFACE_MODE_GMII,
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config->supported_interfaces);
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break;
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- case 5: /* 2nd cpu port supports either rgmii or sgmii/8023z */
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+ /* Port 5 supports rgmii with delays on MT7531BE, sgmii/802.3z on
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+ * MT7531AE.
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+ */
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+ case 5:
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if (!priv->p5_sgmii) {
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phy_interface_set_rgmii(config->supported_interfaces);
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break;
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}
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fallthrough;
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- case 6: /* 1st cpu port supports sgmii/8023z only */
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+ /* Port 6 supports sgmii/802.3z. */
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+ case 6:
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__set_bit(PHY_INTERFACE_MODE_SGMII,
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config->supported_interfaces);
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__set_bit(PHY_INTERFACE_MODE_1000BASEX,
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@@ -2633,11 +2641,13 @@ static void mt7988_mac_port_get_caps(str
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phy_interface_zero(config->supported_interfaces);
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switch (port) {
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- case 0 ... 4: /* Internal phy */
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+ /* Ports which are connected to switch PHYs. There is no MII pinout. */
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+ case 0 ... 4:
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__set_bit(PHY_INTERFACE_MODE_INTERNAL,
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config->supported_interfaces);
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break;
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+ /* Port 6 is connected to SoC's XGMII MAC. There is no MII pinout. */
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case 6:
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__set_bit(PHY_INTERFACE_MODE_INTERNAL,
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config->supported_interfaces);
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@@ -2801,12 +2811,12 @@ mt753x_phylink_mac_config(struct dsa_swi
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u32 mcr_cur, mcr_new;
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switch (port) {
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- case 0 ... 4: /* Internal phy */
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+ case 0 ... 4:
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if (state->interface != PHY_INTERFACE_MODE_GMII &&
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state->interface != PHY_INTERFACE_MODE_INTERNAL)
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goto unsupported;
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break;
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- case 5: /* 2nd cpu port with phy of port 0 or 4 / external phy */
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+ case 5:
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if (priv->p5_interface == state->interface)
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break;
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@@ -2816,7 +2826,7 @@ mt753x_phylink_mac_config(struct dsa_swi
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if (priv->p5_intf_sel != P5_DISABLED)
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priv->p5_interface = state->interface;
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break;
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- case 6: /* 1st cpu port */
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+ case 6:
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if (priv->p6_interface == state->interface)
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break;
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