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2f663cab46
Replace patches for MediaTek Ethernet driver SGMII/SerDes unit with their corresponding upstream patches. Not all of the patches in our tree went upstream as-is, some are slightly different implementations, and they require the phylink_pcs helpers now made available. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
53 lines
1.7 KiB
Diff
53 lines
1.7 KiB
Diff
From c125c66ea71b9377ae2478c4f1b87b180cc5c6ef Mon Sep 17 00:00:00 2001
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From: "Russell King (Oracle)" <rmk+kernel@armlinux.org.uk>
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Date: Thu, 27 Oct 2022 14:11:18 +0100
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Subject: [PATCH 08/10] net: mtk_eth_soc: add advertisement programming
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Program the advertisement into the mtk PCS block.
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Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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---
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drivers/net/ethernet/mediatek/mtk_sgmii.c | 13 ++++++++++++-
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1 file changed, 12 insertions(+), 1 deletion(-)
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--- a/drivers/net/ethernet/mediatek/mtk_sgmii.c
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+++ b/drivers/net/ethernet/mediatek/mtk_sgmii.c
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@@ -70,16 +70,27 @@ static int mtk_pcs_config(struct phylink
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{
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struct mtk_pcs *mpcs = pcs_to_mtk_pcs(pcs);
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unsigned int rgc3;
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+ int advertise;
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+ bool changed;
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if (interface == PHY_INTERFACE_MODE_2500BASEX)
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rgc3 = RG_PHY_SPEED_3_125G;
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else
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rgc3 = 0;
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+ advertise = phylink_mii_c22_pcs_encode_advertisement(interface,
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+ advertising);
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+ if (advertise < 0)
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+ return advertise;
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+
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/* Configure the underlying interface speed */
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regmap_update_bits(mpcs->regmap, mpcs->ana_rgc3,
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RG_PHY_SPEED_3_125G, rgc3);
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+ /* Update the advertisement, noting whether it has changed */
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+ regmap_update_bits_check(mpcs->regmap, SGMSYS_PCS_ADVERTISE,
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+ SGMII_ADVERTISE, advertise, &changed);
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+
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/* Setup SGMIISYS with the determined property */
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if (interface != PHY_INTERFACE_MODE_SGMII)
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mtk_pcs_setup_mode_force(mpcs, interface);
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@@ -90,7 +101,7 @@ static int mtk_pcs_config(struct phylink
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regmap_update_bits(mpcs->regmap, SGMSYS_QPHY_PWR_STATE_CTRL,
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SGMII_PHYA_PWD, 0);
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- return 0;
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+ return changed;
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}
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static void mtk_pcs_restart_an(struct phylink_pcs *pcs)
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