openwrt/target/linux/ath79/dts/ar9344_qihoo_c301.dts

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT

#include "ar9344.dtsi"

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

/ {
	model = "Qihoo 360 C301";
	compatible = "qihoo,c301";

	aliases {
		led-boot = &led_wlan_g;
		led-failsafe = &led_wlan_o;
		led-upgrade = &led_wlan_o;
	};

	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&jtag_disable_pins>;

		led_wlan_g: wlan_g {
			label = "green:wlan";
			gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
		};

		led_wlan_o: wlan_o {
			label = "orange:wlan";
			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
			linux,default-trigger = "phy1tpt";
		};
	};

	keys {
		compatible = "gpio-keys";

		reset {
			linux,code = <KEY_RESTART>;
			gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
			debounce-interval = <60>;
		};
	};

	reg_eth_led_vbus {
		compatible = "regulator-fixed";
		regulator-name = "eth_led_vbus";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
		gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
	};

	usb_vbus: reg_usb_vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb_vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		enable-active-high;
		gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
	};
};

&pinmux {
	pmx_spi_cs1: pinmux_spi_cs1 {
		pinctrl-single,bits = <0xc 0x07 0xff>;
	};

	pmx_led_switch: pinmux_led_switch {
		pinctrl-single,bits = <0x0 0x2b2a2d00 0xffffff00>;
	};
};

&ref {
	clock-frequency = <40000000>;
};

&gpio {
	gpio_ext_lna0 {
		gpio-hog;
		gpios = <14 0>;
		output-high;
		line-name = "c301:ext:lna0";
	};

	gpio_ext_lna1 {
		gpio-hog;
		gpios = <15 0>;
		output-high;
		line-name = "c301:ext:lna1";
	};
};

&builtin_switch {
	pinctrl-names = "default";
	pinctrl-0 = <&pmx_led_switch>;
};

&spi {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&pmx_spi_cs1>;

	flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <25000000>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			uboot: partition@0 {
				label = "u-boot";
				reg = <0x0 0x40000>;
				read-only;
			};

			partition@40000 {
				label = "u-boot-env";
				reg = <0x40000 0x10000>;
				read-only;
			};

			partition@50000 {
				label = "devdata";
				reg = <0x50000 0x10000>;
				read-only;
			};

			partition@60000 {
				label = "devconf";
				reg = <0x60000 0x10000>;
				read-only;
			};

			partition@70000 {
				compatible = "seama";
				label = "firmware";
				reg = <0x70000 0xf60000>;
			};

			partition@fd0000 {
				label = "warm_start";
				reg = <0xfd0000 0x10000>;
				read-only;
			};

			partition@fe0000 {
				label = "action_image_config";
				reg = <0xfe0000 0x10000>;
			};

			partition@ff0000 {
				label = "radiocfg";
				reg = <0xff0000 0x10000>;
				read-only;

				nvmem-layout {
					compatible = "fixed-layout";
					#address-cells = <1>;
					#size-cells = <1>;

					cal_radiocfg_5000: calibration@5000 {
						reg = <0x5000 0x844>;
					};
				};
			};
		};
	};

	flash@1 {
		compatible = "jedec,spi-nor";
		reg = <1>;
		spi-max-frequency = <25000000>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "firmware2";
				reg = <0x0 0xf00000>;
			};

			partition@f00000 {
				label = "privatedata";
				reg = <0xf00000 0x100000>;
				read-only;
			};
		};
	};
};

&usb {
	status = "okay";
};

&usb_phy {
	status = "okay";
	phy-supply = <&usb_vbus>;
};

&pcie {
	status = "okay";

	wifi@0,0 {
		compatible = "qcom,ath10k";
		reg = <0 0 0 0 0>;
		nvmem-cells = <&cal_radiocfg_5000>;
		nvmem-cell-names = "calibration";
	};
};

&wmac {
	status = "okay";
	qca,no-eeprom;
};

&eth1 {
	status = "okay";
	gmac-config {
		device = <&gmac>;
		switch-phy-swap = <1>;
		switch-only-mode = <1>;
	};
};

&eth0 {
	status = "okay";
	phy-handle = <&swphy0>;
};