mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-27 01:11:14 +00:00
31 lines
1.2 KiB
Diff
31 lines
1.2 KiB
Diff
--- a/drivers/ssb/driver_pcicore.c
|
|
+++ b/drivers/ssb/driver_pcicore.c
|
|
@@ -357,6 +357,16 @@ static void ssb_pcicore_init_hostmode(st
|
|
pcicore_write32(pc, SSB_PCICORE_SBTOPCI2,
|
|
SSB_PCICORE_SBTOPCI_MEM | SSB_PCI_DMA);
|
|
|
|
+ /*
|
|
+ * Accessing PCI config without a proper delay after devices reset (not
|
|
+ * GPIO reset) was causing reboots on WRT300N v1.0 (BCM4704).
|
|
+ * Tested delay 850 us lowered reboot chance to 50-80%, 1000 us fixed it
|
|
+ * completely. Flushing all writes was also tested but with no luck.
|
|
+ * The same problem was reported for WRT350N v1 (BCM4705), so we just
|
|
+ * sleep here unconditionally.
|
|
+ */
|
|
+ usleep_range(1000, 2000);
|
|
+
|
|
/* Enable PCI bridge BAR0 prefetch and burst */
|
|
val = PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
|
|
ssb_extpci_write_config(pc, 0, 0, 0, PCI_COMMAND, &val, 2);
|
|
--- a/drivers/ssb/main.c
|
|
+++ b/drivers/ssb/main.c
|
|
@@ -1135,6 +1135,8 @@ static u32 ssb_tmslow_reject_bitmask(str
|
|
case SSB_IDLOW_SSBREV_25: /* TODO - find the proper REJECT bit */
|
|
case SSB_IDLOW_SSBREV_27: /* same here */
|
|
return SSB_TMSLOW_REJECT; /* this is a guess */
|
|
+ case SSB_IDLOW_SSBREV:
|
|
+ break;
|
|
default:
|
|
WARN(1, KERN_INFO "ssb: Backplane Revision 0x%.8X\n", rev);
|
|
}
|