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3cb2fddd30
Backport new features for MediaTek pinctrl/pinconf drivers from upstream. This will serve as the base to improve pinconf bias/pull-up/pull-down on MT7981 and MT7986, and also prepare for upcoming support for MT7988. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
298 lines
9.3 KiB
Diff
298 lines
9.3 KiB
Diff
From e1ff91f9d2303cd4e706cc908bfca21cd17b9927 Mon Sep 17 00:00:00 2001
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From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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Date: Fri, 11 Nov 2022 10:41:06 +0100
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Subject: [PATCH] pinctrl: mediatek: Fix EINT pins input debounce time
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configuration
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The External Interrupt Controller (EINTC) on all of the supported
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MediaTek SoCs does support input debouncing, but not all of them
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index the debounce time values (DBNC_SETTING registers) the same way.
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Before this change, in some cases, as an example, requesting a debounce
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time of 16 milliseconds would mistakenly set the relative DBNC_SETTING
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register to 0x2, resulting in a way shorter debounce time of 500uS.
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To fix the aforementioned issue, define three different debounce_time
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arrays, reflecting the correct register index for each value and for
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each register index variant, and make sure that each SoC pinctrl
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driver uses the right one.
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Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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Link: https://lore.kernel.org/r/20221111094106.18486-1-angelogioacchino.delregno@collabora.com
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Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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---
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drivers/pinctrl/mediatek/mtk-eint.c | 31 +++++++++++++++++++----
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drivers/pinctrl/mediatek/mtk-eint.h | 6 +++++
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drivers/pinctrl/mediatek/pinctrl-mt2701.c | 1 +
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drivers/pinctrl/mediatek/pinctrl-mt2712.c | 1 +
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drivers/pinctrl/mediatek/pinctrl-mt6765.c | 1 +
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drivers/pinctrl/mediatek/pinctrl-mt6779.c | 1 +
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drivers/pinctrl/mediatek/pinctrl-mt7622.c | 1 +
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drivers/pinctrl/mediatek/pinctrl-mt7623.c | 1 +
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drivers/pinctrl/mediatek/pinctrl-mt7629.c | 1 +
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drivers/pinctrl/mediatek/pinctrl-mt8127.c | 1 +
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drivers/pinctrl/mediatek/pinctrl-mt8135.c | 1 +
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drivers/pinctrl/mediatek/pinctrl-mt8167.c | 1 +
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drivers/pinctrl/mediatek/pinctrl-mt8173.c | 1 +
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drivers/pinctrl/mediatek/pinctrl-mt8183.c | 1 +
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drivers/pinctrl/mediatek/pinctrl-mt8192.c | 1 +
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drivers/pinctrl/mediatek/pinctrl-mt8195.c | 1 +
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drivers/pinctrl/mediatek/pinctrl-mt8365.c | 1 +
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drivers/pinctrl/mediatek/pinctrl-mt8516.c | 1 +
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22 files changed, 53 insertions(+), 5 deletions(-)
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--- a/drivers/pinctrl/mediatek/mtk-eint.c
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+++ b/drivers/pinctrl/mediatek/mtk-eint.c
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@@ -24,6 +24,7 @@
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#define MTK_EINT_EDGE_SENSITIVE 0
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#define MTK_EINT_LEVEL_SENSITIVE 1
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#define MTK_EINT_DBNC_SET_DBNC_BITS 4
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+#define MTK_EINT_DBNC_MAX 16
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#define MTK_EINT_DBNC_RST_BIT (0x1 << 1)
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#define MTK_EINT_DBNC_SET_EN (0x1 << 0)
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@@ -48,6 +49,18 @@ static const struct mtk_eint_regs mtk_ge
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.dbnc_clr = 0x700,
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};
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+const unsigned int debounce_time_mt2701[] = {
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+ 500, 1000, 16000, 32000, 64000, 128000, 256000, 0
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+};
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+
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+const unsigned int debounce_time_mt6765[] = {
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+ 125, 250, 500, 1000, 16000, 32000, 64000, 128000, 256000, 512000, 0
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+};
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+
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+const unsigned int debounce_time_mt6795[] = {
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+ 500, 1000, 16000, 32000, 64000, 128000, 256000, 512000, 0
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+};
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+
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static void __iomem *mtk_eint_get_offset(struct mtk_eint *eint,
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unsigned int eint_num,
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unsigned int offset)
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@@ -407,10 +420,11 @@ int mtk_eint_set_debounce(struct mtk_ein
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int virq, eint_offset;
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unsigned int set_offset, bit, clr_bit, clr_offset, rst, i, unmask,
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dbnc;
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- static const unsigned int debounce_time[] = {500, 1000, 16000, 32000,
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- 64000, 128000, 256000};
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struct irq_data *d;
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+ if (!eint->hw->db_time)
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+ return -EOPNOTSUPP;
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+
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virq = irq_find_mapping(eint->domain, eint_num);
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eint_offset = (eint_num % 4) * 8;
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d = irq_get_irq_data(virq);
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@@ -421,9 +435,9 @@ int mtk_eint_set_debounce(struct mtk_ein
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if (!mtk_eint_can_en_debounce(eint, eint_num))
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return -EINVAL;
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- dbnc = ARRAY_SIZE(debounce_time);
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- for (i = 0; i < ARRAY_SIZE(debounce_time); i++) {
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- if (debounce <= debounce_time[i]) {
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+ dbnc = eint->num_db_time;
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+ for (i = 0; i < eint->num_db_time; i++) {
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+ if (debounce <= eint->hw->db_time[i]) {
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dbnc = i;
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break;
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}
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@@ -497,6 +511,13 @@ int mtk_eint_do_init(struct mtk_eint *ei
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if (!eint->domain)
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return -ENOMEM;
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+ if (eint->hw->db_time) {
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+ for (i = 0; i < MTK_EINT_DBNC_MAX; i++)
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+ if (eint->hw->db_time[i] == 0)
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+ break;
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+ eint->num_db_time = i;
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+ }
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+
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mtk_eint_hw_init(eint);
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for (i = 0; i < eint->hw->ap_num; i++) {
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int virq = irq_create_mapping(eint->domain, i);
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--- a/drivers/pinctrl/mediatek/mtk-eint.h
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+++ b/drivers/pinctrl/mediatek/mtk-eint.h
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@@ -37,8 +37,13 @@ struct mtk_eint_hw {
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u8 ports;
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unsigned int ap_num;
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unsigned int db_cnt;
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+ const unsigned int *db_time;
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};
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+extern const unsigned int debounce_time_mt2701[];
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+extern const unsigned int debounce_time_mt6765[];
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+extern const unsigned int debounce_time_mt6795[];
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+
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struct mtk_eint;
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struct mtk_eint_xt {
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@@ -62,6 +67,7 @@ struct mtk_eint {
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/* Used to fit into various EINT device */
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const struct mtk_eint_hw *hw;
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const struct mtk_eint_regs *regs;
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+ u16 num_db_time;
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/* Used to fit into various pinctrl device */
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void *pctl;
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--- a/drivers/pinctrl/mediatek/pinctrl-mt2701.c
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+++ b/drivers/pinctrl/mediatek/pinctrl-mt2701.c
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@@ -531,6 +531,7 @@ static const struct mtk_pinctrl_devdata
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.ports = 6,
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.ap_num = 169,
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.db_cnt = 16,
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+ .db_time = debounce_time_mt2701,
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},
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};
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--- a/drivers/pinctrl/mediatek/pinctrl-mt2712.c
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+++ b/drivers/pinctrl/mediatek/pinctrl-mt2712.c
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@@ -584,6 +584,7 @@ static const struct mtk_pinctrl_devdata
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.ports = 8,
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.ap_num = 229,
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.db_cnt = 40,
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+ .db_time = debounce_time_mt2701,
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},
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};
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--- a/drivers/pinctrl/mediatek/pinctrl-mt6765.c
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+++ b/drivers/pinctrl/mediatek/pinctrl-mt6765.c
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@@ -1062,6 +1062,7 @@ static const struct mtk_eint_hw mt6765_e
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.ports = 6,
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.ap_num = 160,
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.db_cnt = 13,
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+ .db_time = debounce_time_mt6765,
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};
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static const struct mtk_pin_soc mt6765_data = {
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--- a/drivers/pinctrl/mediatek/pinctrl-mt6779.c
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+++ b/drivers/pinctrl/mediatek/pinctrl-mt6779.c
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@@ -737,6 +737,7 @@ static const struct mtk_eint_hw mt6779_e
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.ports = 6,
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.ap_num = 195,
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.db_cnt = 13,
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+ .db_time = debounce_time_mt2701,
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};
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static const struct mtk_pin_soc mt6779_data = {
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--- a/drivers/pinctrl/mediatek/pinctrl-mt7622.c
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+++ b/drivers/pinctrl/mediatek/pinctrl-mt7622.c
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@@ -846,6 +846,7 @@ static const struct mtk_eint_hw mt7622_e
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.ports = 7,
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.ap_num = ARRAY_SIZE(mt7622_pins),
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.db_cnt = 20,
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+ .db_time = debounce_time_mt6765,
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};
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static const struct mtk_pin_soc mt7622_data = {
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--- a/drivers/pinctrl/mediatek/pinctrl-mt7623.c
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+++ b/drivers/pinctrl/mediatek/pinctrl-mt7623.c
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@@ -1369,6 +1369,7 @@ static const struct mtk_eint_hw mt7623_e
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.ports = 6,
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.ap_num = 169,
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.db_cnt = 20,
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+ .db_time = debounce_time_mt2701,
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};
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static struct mtk_pin_soc mt7623_data = {
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--- a/drivers/pinctrl/mediatek/pinctrl-mt7629.c
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+++ b/drivers/pinctrl/mediatek/pinctrl-mt7629.c
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@@ -402,6 +402,7 @@ static const struct mtk_eint_hw mt7629_e
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.ports = 7,
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.ap_num = ARRAY_SIZE(mt7629_pins),
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.db_cnt = 16,
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+ .db_time = debounce_time_mt2701,
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};
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static struct mtk_pin_soc mt7629_data = {
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--- a/drivers/pinctrl/mediatek/pinctrl-mt8127.c
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+++ b/drivers/pinctrl/mediatek/pinctrl-mt8127.c
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@@ -300,6 +300,7 @@ static const struct mtk_pinctrl_devdata
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.ports = 6,
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.ap_num = 143,
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.db_cnt = 16,
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+ .db_time = debounce_time_mt2701,
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},
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};
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--- a/drivers/pinctrl/mediatek/pinctrl-mt8135.c
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+++ b/drivers/pinctrl/mediatek/pinctrl-mt8135.c
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@@ -313,6 +313,7 @@ static const struct mtk_pinctrl_devdata
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.ports = 6,
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.ap_num = 192,
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.db_cnt = 16,
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+ .db_time = debounce_time_mt2701,
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},
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};
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--- a/drivers/pinctrl/mediatek/pinctrl-mt8167.c
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+++ b/drivers/pinctrl/mediatek/pinctrl-mt8167.c
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@@ -332,6 +332,7 @@ static const struct mtk_pinctrl_devdata
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.ports = 6,
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.ap_num = 169,
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.db_cnt = 64,
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+ .db_time = debounce_time_mt6795,
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},
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};
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--- a/drivers/pinctrl/mediatek/pinctrl-mt8173.c
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+++ b/drivers/pinctrl/mediatek/pinctrl-mt8173.c
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@@ -340,6 +340,7 @@ static const struct mtk_pinctrl_devdata
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.ports = 6,
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.ap_num = 224,
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.db_cnt = 16,
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+ .db_time = debounce_time_mt2701,
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},
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};
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--- a/drivers/pinctrl/mediatek/pinctrl-mt8183.c
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+++ b/drivers/pinctrl/mediatek/pinctrl-mt8183.c
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@@ -545,6 +545,7 @@ static const struct mtk_eint_hw mt8183_e
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.ports = 6,
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.ap_num = 212,
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.db_cnt = 13,
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+ .db_time = debounce_time_mt6765,
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};
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static const struct mtk_pin_soc mt8183_data = {
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--- a/drivers/pinctrl/mediatek/pinctrl-mt8192.c
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+++ b/drivers/pinctrl/mediatek/pinctrl-mt8192.c
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@@ -1339,6 +1339,7 @@ static const struct mtk_eint_hw mt8192_e
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.ports = 7,
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.ap_num = 224,
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.db_cnt = 32,
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+ .db_time = debounce_time_mt6765,
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};
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static const struct mtk_pin_reg_calc mt8192_reg_cals[PINCTRL_PIN_REG_MAX] = {
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--- a/drivers/pinctrl/mediatek/pinctrl-mt8195.c
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+++ b/drivers/pinctrl/mediatek/pinctrl-mt8195.c
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@@ -805,6 +805,7 @@ static const struct mtk_eint_hw mt8195_e
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.ports = 7,
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.ap_num = 225,
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.db_cnt = 32,
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+ .db_time = debounce_time_mt6765,
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};
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static const struct mtk_pin_soc mt8195_data = {
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--- a/drivers/pinctrl/mediatek/pinctrl-mt8365.c
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+++ b/drivers/pinctrl/mediatek/pinctrl-mt8365.c
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@@ -466,6 +466,7 @@ static const struct mtk_pinctrl_devdata
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.ports = 5,
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.ap_num = 160,
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.db_cnt = 160,
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+ .db_time = debounce_time_mt6765,
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},
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};
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--- a/drivers/pinctrl/mediatek/pinctrl-mt8516.c
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+++ b/drivers/pinctrl/mediatek/pinctrl-mt8516.c
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@@ -332,6 +332,7 @@ static const struct mtk_pinctrl_devdata
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.ports = 6,
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.ap_num = 169,
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.db_cnt = 64,
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+ .db_time = debounce_time_mt6795,
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},
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};
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