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e4ce3109f2
The node pinctrl0 is already set up in the SOC DTSI files, but defined again as member of pinctrl in most of the device DTS(I) files. This patch removes this redundancy for the entire ramips target. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
138 lines
2.0 KiB
Plaintext
138 lines
2.0 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include "mt7620a.dtsi"
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/gpio/gpio.h>
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/ {
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compatible = "dlink,dir-510l", "ralink,mt7620a-soc";
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model = "D-Link DIR-510L";
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aliases {
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led-boot = &led_status;
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led-failsafe = &led_status;
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led-running = &led_status;
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led-upgrade = &led_status;
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};
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chosen {
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bootargs = "console=ttyS1,57600";
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};
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keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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wps {
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label = "wps";
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gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WPS_BUTTON>;
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};
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};
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leds {
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compatible = "gpio-leds";
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led_status: status {
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label = "dir-510l:green:status";
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gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
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};
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status-red {
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label = "dir-510l:red:status";
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gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
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};
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};
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};
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ðernet {
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mediatek,portmap = "llllw";
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};
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&uart {
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status = "okay";
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};
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&gpio0 {
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status = "okay";
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};
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&spi0 {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <50000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "jboot";
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reg = <0x0 0x10000>;
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read-only;
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};
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partition@10000 {
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label = "recovery";
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reg = <0x10000 0x200000>;
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read-only;
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};
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partition@210000 {
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compatible = "amit,jimage";
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label = "firmware";
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reg = <0x210000 0xde0000>;
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};
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config: partition@ff0000 {
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label = "config";
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reg = <0xff0000 0x10000>;
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read-only;
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};
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};
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};
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};
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&ehci {
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status = "okay";
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};
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&ohci {
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status = "okay";
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};
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&pcie {
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status = "okay";
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};
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&pcie0 {
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mt76x0e@0,0 {
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reg = <0x0000 0 0 0 0>;
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mtd-mac-address = <&config 0xe490>;
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mtd-mac-address-increment = <(2)>;
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mediatek,mtd-eeprom = <&config 0xe05d>;
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};
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};
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&gsw {
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mediatek,port4 = "ephy";
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};
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&state_default {
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default {
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ralink,group = "i2c", "uartf";
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ralink,function = "gpio";
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};
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};
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