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7c459ac1d5
Serge Vasilugin reports: To improve mt7620 built-in wifi performance some changes: 1. Correct BW20/BW40 switching (see comments with mark (1)) 2. Correct TX_SW_CFG1 MAC reg from v3 of vendor driver see https://gitlab.com/dm38/padavan-ng/-/blob/master/trunk/proprietary/rt_wifi/rtpci/3.0.X.X/mt76x2/chips/rt6352.c#L531 3. Set bbp66 for all chains. 4. US_CYC_CNT init based on Programming guide, default value was 33 (pci), set chipset bus clock with fallback to cpu clock/3. 5. Don't overwrite default values for mt7620. 6. Correct some typos. 7. Add support for external LNA: a) RF and BBP regs never be corrected for this mode b) eLNA is driven the same way as ePA with mt7620's pin PA but vendor driver explicitly pin PA to gpio mode (for forrect calibration?) so I'm not sure that request for pa_pin in dts-file will be enough First 5 changes (really 2) improve performance for boards w/o eLNA/ePA. Changes 7 add support for eLNA Configuration w/o eLAN/ePA and with eLNA show results tx/rx (from router point of view) for each stream: 35-40/30-35 Mbps for HT20 65-70/60-65 Mbps for HT40 Yes. Max results for 2T2R client is 140-145/135-140 with peaks 160/150, It correspond to mediatek driver results. Boards with ePA untested. Reported-by: Serge Vasilugin <vasilugin@yandex.ru> Signed-off-by: Daniel Golle <daniel@makrotopia.org> [directly include v3 of the patchset submitted upstream] (cherry picked from commit31a6605de0) (cherry picked from commite785ca05e9) (cherry picked from commit412fcf3d44)
118 lines
4.0 KiB
Diff
118 lines
4.0 KiB
Diff
From patchwork Sat Sep 17 20:27:56 2022
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Content-Type: text/plain; charset="utf-8"
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MIME-Version: 1.0
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Content-Transfer-Encoding: 8bit
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X-Patchwork-Submitter: Daniel Golle <daniel@makrotopia.org>
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X-Patchwork-Id: 12979248
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X-Patchwork-Delegate: kvalo@adurom.com
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Return-Path: <linux-wireless-owner@kernel.org>
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Date: Sat, 17 Sep 2022 21:27:56 +0100
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From: Daniel Golle <daniel@makrotopia.org>
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To: linux-wireless@vger.kernel.org, Stanislaw Gruszka <stf_xl@wp.pl>,
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Helmut Schaa <helmut.schaa@googlemail.com>
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Cc: Kalle Valo <kvalo@kernel.org>,
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"David S. Miller" <davem@davemloft.net>,
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Eric Dumazet <edumazet@google.com>,
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Jakub Kicinski <kuba@kernel.org>,
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Paolo Abeni <pabeni@redhat.com>,
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Johannes Berg <johannes.berg@intel.com>
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Subject: [PATCH v3 07/16] rt2x00: add RXDCOC calibration for MT7620
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Message-ID:
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<850b30f652e88de30d79e968af4eb47aa5bc2511.1663445157.git.daniel@makrotopia.org>
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References: <cover.1663445157.git.daniel@makrotopia.org>
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MIME-Version: 1.0
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Content-Disposition: inline
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In-Reply-To: <cover.1663445157.git.daniel@makrotopia.org>
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Precedence: bulk
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List-ID: <linux-wireless.vger.kernel.org>
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X-Mailing-List: linux-wireless@vger.kernel.org
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From: Tomislav Požega <pozega.tomislav@gmail.com>
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Add RXDCOC calibration code from mtk driver.
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Signed-off-by: Tomislav Požega <pozega.tomislav@gmail.com>
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[fixed typo reported by Serge Vasilugin <vasilugin@yandex.ru>]
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Signed-off-by: Daniel Golle <daniel@makrotopia.org>
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Acked-by: Stanislaw Gruszka <stf_xl@wp.pl>
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---
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.../net/wireless/ralink/rt2x00/rt2800lib.c | 60 +++++++++++++++++++
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1 file changed, 60 insertions(+)
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--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
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+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
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@@ -8607,6 +8607,65 @@ static void rt2800_r_calibration(struct
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rt2800_register_write(rt2x00dev, PWR_PIN_CFG, MAC_PWR_PIN_CFG);
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}
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+static void rt2800_rxdcoc_calibration(struct rt2x00_dev *rt2x00dev)
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+{
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+ u8 bbpreg = 0;
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+ u32 macvalue = 0;
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+ u8 saverfb0r2, saverfb5r4, saverfb7r4, rfvalue;
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+ int i;
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+
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+ saverfb0r2 = rt2800_rfcsr_read_bank(rt2x00dev, 0, 2);
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+ rfvalue = saverfb0r2;
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+ rfvalue |= 0x03;
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+ rt2800_rfcsr_write_bank(rt2x00dev, 0, 2, rfvalue);
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+
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+ rt2800_bbp_write(rt2x00dev, 158, 141);
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+ bbpreg = rt2800_bbp_read(rt2x00dev, 159);
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+ bbpreg |= 0x10;
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+ rt2800_bbp_write(rt2x00dev, 159, bbpreg);
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+
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+ macvalue = rt2800_register_read(rt2x00dev, MAC_SYS_CTRL);
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+ rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, 0x8);
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+
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+ if (unlikely(rt2800_wait_bbp_rf_ready(rt2x00dev, MAC_STATUS_CFG_BBP_RF_BUSY_TX)))
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+ rt2x00_warn(rt2x00dev, "RF TX busy in RX RXDCOC calibration\n");
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+
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+ saverfb5r4 = rt2800_rfcsr_read_bank(rt2x00dev, 5, 4);
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+ saverfb7r4 = rt2800_rfcsr_read_bank(rt2x00dev, 7, 4);
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+ saverfb5r4 = saverfb5r4 & (~0x40);
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+ saverfb7r4 = saverfb7r4 & (~0x40);
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+ rt2800_rfcsr_write_dccal(rt2x00dev, 4, 0x64);
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+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 4, saverfb5r4);
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+ rt2800_rfcsr_write_bank(rt2x00dev, 7, 4, saverfb7r4);
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+
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+ rt2800_bbp_write(rt2x00dev, 158, 141);
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+ bbpreg = rt2800_bbp_read(rt2x00dev, 159);
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+ bbpreg = bbpreg & (~0x40);
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+ rt2800_bbp_write(rt2x00dev, 159, bbpreg);
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+ bbpreg |= 0x48;
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+ rt2800_bbp_write(rt2x00dev, 159, bbpreg);
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+
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+ for (i = 0; i < 10000; i++) {
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+ bbpreg = rt2800_bbp_read(rt2x00dev, 159);
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+ if ((bbpreg & 0x40) == 0)
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+ break;
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+ usleep_range(50, 100);
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+ }
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+
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+ bbpreg = rt2800_bbp_read(rt2x00dev, 159);
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+ bbpreg = bbpreg & (~0x40);
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+ rt2800_bbp_write(rt2x00dev, 159, bbpreg);
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+
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+ rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, macvalue);
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+
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+ rt2800_bbp_write(rt2x00dev, 158, 141);
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+ bbpreg = rt2800_bbp_read(rt2x00dev, 159);
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+ bbpreg &= (~0x10);
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+ rt2800_bbp_write(rt2x00dev, 159, bbpreg);
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+
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+ rt2800_rfcsr_write_bank(rt2x00dev, 0, 2, saverfb0r2);
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+}
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+
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static void rt2800_bbp_core_soft_reset(struct rt2x00_dev *rt2x00dev,
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bool set_bw, bool is_ht40)
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{
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@@ -9216,6 +9275,7 @@ static void rt2800_init_rfcsr_6352(struc
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rt2800_r_calibration(rt2x00dev);
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rt2800_rf_self_txdc_cal(rt2x00dev);
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+ rt2800_rxdcoc_calibration(rt2x00dev);
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rt2800_bw_filter_calibration(rt2x00dev, true);
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rt2800_bw_filter_calibration(rt2x00dev, false);
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}
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