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https://github.com/openwrt/openwrt.git
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c957af0a0f
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu> SVN-Revision: 39471
581 lines
16 KiB
Diff
581 lines
16 KiB
Diff
From c6890cadc2129a07d69f3dcbfca66522c27b8069 Mon Sep 17 00:00:00 2001
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From: Carlo Caione <carlo.caione@gmail.com>
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Date: Sat, 16 Nov 2013 18:33:54 +0100
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Subject: [PATCH] ARM: sun4i/sun7i: RTC driver
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This patch introduces the driver for the RTC in the Allwinner A10 and
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A20 SoCs.
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Signed-off-by: Carlo Caione <carlo.caione@gmail.com>
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Acked-by: Alessandro Zummo <a.zummo@towertech.it>
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Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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---
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drivers/rtc/Kconfig | 7 +
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drivers/rtc/Makefile | 1 +
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drivers/rtc/rtc-sunxi.c | 523 ++++++++++++++++++++++++++++++++++++++++++++++++
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3 files changed, 531 insertions(+)
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create mode 100644 drivers/rtc/rtc-sunxi.c
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diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
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index 0077302..c2fa86c 100644
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--- a/drivers/rtc/Kconfig
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+++ b/drivers/rtc/Kconfig
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@@ -1104,6 +1104,13 @@ config RTC_DRV_SUN4V
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If you say Y here you will get support for the Hypervisor
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based RTC on SUN4V systems.
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+config RTC_DRV_SUNXI
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+ tristate "Allwinner sun4i/sun7i RTC"
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+ depends on ARCH_SUNXI
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+ help
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+ If you say Y here you will get support for the RTC found on
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+ Allwinner A10/A20.
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+
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config RTC_DRV_STARFIRE
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bool "Starfire RTC"
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depends on SPARC64
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diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
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index 27b4bd8..63f3e99 100644
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--- a/drivers/rtc/Makefile
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+++ b/drivers/rtc/Makefile
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@@ -117,6 +117,7 @@ obj-$(CONFIG_RTC_DRV_STARFIRE) += rtc-starfire.o
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obj-$(CONFIG_RTC_DRV_STK17TA8) += rtc-stk17ta8.o
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obj-$(CONFIG_RTC_DRV_STMP) += rtc-stmp3xxx.o
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obj-$(CONFIG_RTC_DRV_SUN4V) += rtc-sun4v.o
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+obj-$(CONFIG_RTC_DRV_SUNXI) += rtc-sunxi.o
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obj-$(CONFIG_RTC_DRV_TEGRA) += rtc-tegra.o
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obj-$(CONFIG_RTC_DRV_TEST) += rtc-test.o
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obj-$(CONFIG_RTC_DRV_TILE) += rtc-tile.o
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diff --git a/drivers/rtc/rtc-sunxi.c b/drivers/rtc/rtc-sunxi.c
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new file mode 100644
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index 0000000..68a3528
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--- /dev/null
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+++ b/drivers/rtc/rtc-sunxi.c
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@@ -0,0 +1,523 @@
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+/*
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+ * An RTC driver for Allwinner A10/A20
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+ *
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+ * Copyright (c) 2013, Carlo Caione <carlo.caione@gmail.com>
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License as published by
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+ * the Free Software Foundation; either version 2 of the License, or
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+ * (at your option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful, but WITHOUT
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+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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+ * more details.
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+ *
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+ * You should have received a copy of the GNU General Public License along
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+ * with this program; if not, write to the Free Software Foundation, Inc.,
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+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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+ */
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+
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+#include <linux/delay.h>
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+#include <linux/err.h>
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+#include <linux/fs.h>
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+#include <linux/init.h>
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+#include <linux/interrupt.h>
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+#include <linux/io.h>
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+#include <linux/kernel.h>
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+#include <linux/module.h>
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+#include <linux/of.h>
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+#include <linux/of_address.h>
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+#include <linux/of_device.h>
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+#include <linux/platform_device.h>
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+#include <linux/rtc.h>
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+#include <linux/types.h>
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+
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+#define SUNXI_LOSC_CTRL 0x0000
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+#define SUNXI_LOSC_CTRL_RTC_HMS_ACC BIT(8)
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+#define SUNXI_LOSC_CTRL_RTC_YMD_ACC BIT(7)
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+
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+#define SUNXI_RTC_YMD 0x0004
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+
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+#define SUNXI_RTC_HMS 0x0008
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+
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+#define SUNXI_ALRM_DHMS 0x000c
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+
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+#define SUNXI_ALRM_EN 0x0014
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+#define SUNXI_ALRM_EN_CNT_EN BIT(8)
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+
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+#define SUNXI_ALRM_IRQ_EN 0x0018
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+#define SUNXI_ALRM_IRQ_EN_CNT_IRQ_EN BIT(0)
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+
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+#define SUNXI_ALRM_IRQ_STA 0x001c
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+#define SUNXI_ALRM_IRQ_STA_CNT_IRQ_PEND BIT(0)
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+
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+#define SUNXI_MASK_DH 0x0000001f
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+#define SUNXI_MASK_SM 0x0000003f
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+#define SUNXI_MASK_M 0x0000000f
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+#define SUNXI_MASK_LY 0x00000001
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+#define SUNXI_MASK_D 0x00000ffe
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+#define SUNXI_MASK_M 0x0000000f
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+
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+#define SUNXI_GET(x, mask, shift) (((x) & ((mask) << (shift))) \
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+ >> (shift))
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+
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+#define SUNXI_SET(x, mask, shift) (((x) & (mask)) << (shift))
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+
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+/*
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+ * Get date values
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+ */
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+#define SUNXI_DATE_GET_DAY_VALUE(x) SUNXI_GET(x, SUNXI_MASK_DH, 0)
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+#define SUNXI_DATE_GET_MON_VALUE(x) SUNXI_GET(x, SUNXI_MASK_M, 8)
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+#define SUNXI_DATE_GET_YEAR_VALUE(x, mask) SUNXI_GET(x, mask, 16)
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+
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+/*
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+ * Get time values
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+ */
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+#define SUNXI_TIME_GET_SEC_VALUE(x) SUNXI_GET(x, SUNXI_MASK_SM, 0)
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+#define SUNXI_TIME_GET_MIN_VALUE(x) SUNXI_GET(x, SUNXI_MASK_SM, 8)
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+#define SUNXI_TIME_GET_HOUR_VALUE(x) SUNXI_GET(x, SUNXI_MASK_DH, 16)
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+
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+/*
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+ * Get alarm values
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+ */
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+#define SUNXI_ALRM_GET_SEC_VALUE(x) SUNXI_GET(x, SUNXI_MASK_SM, 0)
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+#define SUNXI_ALRM_GET_MIN_VALUE(x) SUNXI_GET(x, SUNXI_MASK_SM, 8)
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+#define SUNXI_ALRM_GET_HOUR_VALUE(x) SUNXI_GET(x, SUNXI_MASK_DH, 16)
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+
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+/*
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+ * Set date values
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+ */
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+#define SUNXI_DATE_SET_DAY_VALUE(x) SUNXI_DATE_GET_DAY_VALUE(x)
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+#define SUNXI_DATE_SET_MON_VALUE(x) SUNXI_SET(x, SUNXI_MASK_M, 8)
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+#define SUNXI_DATE_SET_YEAR_VALUE(x, mask) SUNXI_SET(x, mask, 16)
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+#define SUNXI_LEAP_SET_VALUE(x, shift) SUNXI_SET(x, SUNXI_MASK_LY, shift)
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+
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+/*
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+ * Set time values
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+ */
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+#define SUNXI_TIME_SET_SEC_VALUE(x) SUNXI_TIME_GET_SEC_VALUE(x)
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+#define SUNXI_TIME_SET_MIN_VALUE(x) SUNXI_SET(x, SUNXI_MASK_SM, 8)
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+#define SUNXI_TIME_SET_HOUR_VALUE(x) SUNXI_SET(x, SUNXI_MASK_DH, 16)
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+
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+/*
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+ * Set alarm values
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+ */
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+#define SUNXI_ALRM_SET_SEC_VALUE(x) SUNXI_ALRM_GET_SEC_VALUE(x)
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+#define SUNXI_ALRM_SET_MIN_VALUE(x) SUNXI_SET(x, SUNXI_MASK_SM, 8)
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+#define SUNXI_ALRM_SET_HOUR_VALUE(x) SUNXI_SET(x, SUNXI_MASK_DH, 16)
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+#define SUNXI_ALRM_SET_DAY_VALUE(x) SUNXI_SET(x, SUNXI_MASK_D, 21)
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+
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+/*
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+ * Time unit conversions
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+ */
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+#define SEC_IN_MIN 60
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+#define SEC_IN_HOUR (60 * SEC_IN_MIN)
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+#define SEC_IN_DAY (24 * SEC_IN_HOUR)
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+
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+/*
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+ * The year parameter passed to the driver is usually an offset relative to
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+ * the year 1900. This macro is used to convert this offset to another one
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+ * relative to the minimum year allowed by the hardware.
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+ */
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+#define SUNXI_YEAR_OFF(x) ((x)->min - 1900)
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+
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+/*
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+ * min and max year are arbitrary set considering the limited range of the
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+ * hardware register field
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+ */
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+struct sunxi_rtc_data_year {
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+ unsigned int min; /* min year allowed */
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+ unsigned int max; /* max year allowed */
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+ unsigned int mask; /* mask for the year field */
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+ unsigned char leap_shift; /* bit shift to get the leap year */
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+};
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+
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+static struct sunxi_rtc_data_year data_year_param[] = {
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+ [0] = {
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+ .min = 2010,
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+ .max = 2073,
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+ .mask = 0x3f,
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+ .leap_shift = 22,
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+ },
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+ [1] = {
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+ .min = 1970,
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+ .max = 2225,
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+ .mask = 0xff,
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+ .leap_shift = 24,
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+ },
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+};
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+
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+struct sunxi_rtc_dev {
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+ struct rtc_device *rtc;
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+ struct device *dev;
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+ struct sunxi_rtc_data_year *data_year;
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+ void __iomem *base;
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+ int irq;
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+};
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+
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+static irqreturn_t sunxi_rtc_alarmirq(int irq, void *id)
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+{
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+ struct sunxi_rtc_dev *chip = (struct sunxi_rtc_dev *) id;
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+ u32 val;
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+
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+ val = readl(chip->base + SUNXI_ALRM_IRQ_STA);
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+
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+ if (val & SUNXI_ALRM_IRQ_STA_CNT_IRQ_PEND) {
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+ val |= SUNXI_ALRM_IRQ_STA_CNT_IRQ_PEND;
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+ writel(val, chip->base + SUNXI_ALRM_IRQ_STA);
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+
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+ rtc_update_irq(chip->rtc, 1, RTC_AF | RTC_IRQF);
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+
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+ return IRQ_HANDLED;
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+ }
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+
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+ return IRQ_NONE;
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+}
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+
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+static void sunxi_rtc_setaie(int to, struct sunxi_rtc_dev *chip)
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+{
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+ u32 alrm_val = 0;
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+ u32 alrm_irq_val = 0;
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+
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+ if (to) {
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+ alrm_val = readl(chip->base + SUNXI_ALRM_EN);
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+ alrm_val |= SUNXI_ALRM_EN_CNT_EN;
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+
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+ alrm_irq_val = readl(chip->base + SUNXI_ALRM_IRQ_EN);
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+ alrm_irq_val |= SUNXI_ALRM_IRQ_EN_CNT_IRQ_EN;
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+ } else {
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+ writel(SUNXI_ALRM_IRQ_STA_CNT_IRQ_PEND,
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+ chip->base + SUNXI_ALRM_IRQ_STA);
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+ }
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+
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+ writel(alrm_val, chip->base + SUNXI_ALRM_EN);
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+ writel(alrm_irq_val, chip->base + SUNXI_ALRM_IRQ_EN);
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+}
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+
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+static int sunxi_rtc_getalarm(struct device *dev, struct rtc_wkalrm *wkalrm)
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+{
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+ struct sunxi_rtc_dev *chip = dev_get_drvdata(dev);
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+ struct rtc_time *alrm_tm = &wkalrm->time;
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+ u32 alrm;
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+ u32 alrm_en;
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+ u32 date;
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+
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+ alrm = readl(chip->base + SUNXI_ALRM_DHMS);
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+ date = readl(chip->base + SUNXI_RTC_YMD);
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+
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+ alrm_tm->tm_sec = SUNXI_ALRM_GET_SEC_VALUE(alrm);
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+ alrm_tm->tm_min = SUNXI_ALRM_GET_MIN_VALUE(alrm);
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+ alrm_tm->tm_hour = SUNXI_ALRM_GET_HOUR_VALUE(alrm);
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+
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+ alrm_tm->tm_mday = SUNXI_DATE_GET_DAY_VALUE(date);
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+ alrm_tm->tm_mon = SUNXI_DATE_GET_MON_VALUE(date);
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+ alrm_tm->tm_year = SUNXI_DATE_GET_YEAR_VALUE(date,
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+ chip->data_year->mask);
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+
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+ alrm_tm->tm_mon -= 1;
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+
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+ /*
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+ * switch from (data_year->min)-relative offset to
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+ * a (1900)-relative one
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+ */
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+ alrm_tm->tm_year += SUNXI_YEAR_OFF(chip->data_year);
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+
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+ alrm_en = readl(chip->base + SUNXI_ALRM_IRQ_EN);
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+ if (alrm_en & SUNXI_ALRM_EN_CNT_EN)
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+ wkalrm->enabled = 1;
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+
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+ return 0;
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+}
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+
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+static int sunxi_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
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+{
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+ struct sunxi_rtc_dev *chip = dev_get_drvdata(dev);
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+ u32 date, time;
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+
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+ /*
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+ * read again in case it changes
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+ */
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+ do {
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+ date = readl(chip->base + SUNXI_RTC_YMD);
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+ time = readl(chip->base + SUNXI_RTC_HMS);
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+ } while ((date != readl(chip->base + SUNXI_RTC_YMD)) ||
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+ (time != readl(chip->base + SUNXI_RTC_HMS)));
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+
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+ rtc_tm->tm_sec = SUNXI_TIME_GET_SEC_VALUE(time);
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+ rtc_tm->tm_min = SUNXI_TIME_GET_MIN_VALUE(time);
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+ rtc_tm->tm_hour = SUNXI_TIME_GET_HOUR_VALUE(time);
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+
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+ rtc_tm->tm_mday = SUNXI_DATE_GET_DAY_VALUE(date);
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+ rtc_tm->tm_mon = SUNXI_DATE_GET_MON_VALUE(date);
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+ rtc_tm->tm_year = SUNXI_DATE_GET_YEAR_VALUE(date,
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+ chip->data_year->mask);
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+
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+ rtc_tm->tm_mon -= 1;
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+
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+ /*
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+ * switch from (data_year->min)-relative offset to
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+ * a (1900)-relative one
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+ */
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+ rtc_tm->tm_year += SUNXI_YEAR_OFF(chip->data_year);
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+
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+ return rtc_valid_tm(rtc_tm);
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+}
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+
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+static int sunxi_rtc_setalarm(struct device *dev, struct rtc_wkalrm *wkalrm)
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+{
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+ struct sunxi_rtc_dev *chip = dev_get_drvdata(dev);
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+ struct rtc_time *alrm_tm = &wkalrm->time;
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+ struct rtc_time tm_now;
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+ u32 alrm = 0;
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+ unsigned long time_now = 0;
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+ unsigned long time_set = 0;
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+ unsigned long time_gap = 0;
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+ unsigned long time_gap_day = 0;
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+ unsigned long time_gap_hour = 0;
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+ unsigned long time_gap_min = 0;
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+ int ret = 0;
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+
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+ ret = sunxi_rtc_gettime(dev, &tm_now);
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+ if (ret < 0) {
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+ dev_err(dev, "Error in getting time\n");
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+ return -EINVAL;
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+ }
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+
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+ rtc_tm_to_time(alrm_tm, &time_set);
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+ rtc_tm_to_time(&tm_now, &time_now);
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+ if (time_set <= time_now) {
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+ dev_err(dev, "Date to set in the past\n");
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+ return -EINVAL;
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+ }
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+
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+ time_gap = time_set - time_now;
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+ time_gap_day = time_gap / SEC_IN_DAY;
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+ time_gap -= time_gap_day * SEC_IN_DAY;
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+ time_gap_hour = time_gap / SEC_IN_HOUR;
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+ time_gap -= time_gap_hour * SEC_IN_HOUR;
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+ time_gap_min = time_gap / SEC_IN_MIN;
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+ time_gap -= time_gap_min * SEC_IN_MIN;
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+
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+ if (time_gap_day > 255) {
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+ dev_err(dev, "Day must be in the range 0 - 255\n");
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+ return -EINVAL;
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+ }
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+
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+ sunxi_rtc_setaie(0, chip);
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+ writel(0, chip->base + SUNXI_ALRM_DHMS);
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+ usleep_range(100, 300);
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+
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+ alrm = SUNXI_ALRM_SET_SEC_VALUE(time_gap) |
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+ SUNXI_ALRM_SET_MIN_VALUE(time_gap_min) |
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+ SUNXI_ALRM_SET_HOUR_VALUE(time_gap_hour) |
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+ SUNXI_ALRM_SET_DAY_VALUE(time_gap_day);
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+ writel(alrm, chip->base + SUNXI_ALRM_DHMS);
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+
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+ writel(0, chip->base + SUNXI_ALRM_IRQ_EN);
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+ writel(SUNXI_ALRM_IRQ_EN_CNT_IRQ_EN, chip->base + SUNXI_ALRM_IRQ_EN);
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+
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+ sunxi_rtc_setaie(wkalrm->enabled, chip);
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+
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+ return 0;
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+}
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+
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+static int sunxi_rtc_wait(struct sunxi_rtc_dev *chip, int offset,
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+ unsigned int mask, unsigned int ms_timeout)
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+{
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+ const unsigned long timeout = jiffies + msecs_to_jiffies(ms_timeout);
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+ u32 reg;
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+
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+ do {
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+ reg = readl(chip->base + offset);
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+ reg &= mask;
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+
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+ if (reg == mask)
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+ return 0;
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+
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+ } while (time_before(jiffies, timeout));
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+
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+ return -ETIMEDOUT;
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+}
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+
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+static int sunxi_rtc_settime(struct device *dev, struct rtc_time *rtc_tm)
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+{
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+ struct sunxi_rtc_dev *chip = dev_get_drvdata(dev);
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+ u32 date = 0;
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+ u32 time = 0;
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+ int year;
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+
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+ /*
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+ * the input rtc_tm->tm_year is the offset relative to 1900. We use
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+ * the SUNXI_YEAR_OFF macro to rebase it with respect to the min year
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+ * allowed by the hardware
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+ */
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+
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+ year = rtc_tm->tm_year + 1900;
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+ if (year < chip->data_year->min || year > chip->data_year->max) {
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+ dev_err(dev, "rtc only supports year in range %d - %d\n",
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+ chip->data_year->min, chip->data_year->max);
|
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+ return -EINVAL;
|
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+ }
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+
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+ rtc_tm->tm_year -= SUNXI_YEAR_OFF(chip->data_year);
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+ rtc_tm->tm_mon += 1;
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+
|
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+ date = SUNXI_DATE_SET_DAY_VALUE(rtc_tm->tm_mday) |
|
|
+ SUNXI_DATE_SET_MON_VALUE(rtc_tm->tm_mon) |
|
|
+ SUNXI_DATE_SET_YEAR_VALUE(rtc_tm->tm_year,
|
|
+ chip->data_year->mask);
|
|
+
|
|
+ if (is_leap_year(year))
|
|
+ date |= SUNXI_LEAP_SET_VALUE(1, chip->data_year->leap_shift);
|
|
+
|
|
+ time = SUNXI_TIME_SET_SEC_VALUE(rtc_tm->tm_sec) |
|
|
+ SUNXI_TIME_SET_MIN_VALUE(rtc_tm->tm_min) |
|
|
+ SUNXI_TIME_SET_HOUR_VALUE(rtc_tm->tm_hour);
|
|
+
|
|
+ writel(0, chip->base + SUNXI_RTC_HMS);
|
|
+ writel(0, chip->base + SUNXI_RTC_YMD);
|
|
+
|
|
+ writel(time, chip->base + SUNXI_RTC_HMS);
|
|
+
|
|
+ /*
|
|
+ * After writing the RTC HH-MM-SS register, the
|
|
+ * SUNXI_LOSC_CTRL_RTC_HMS_ACC bit is set and it will not
|
|
+ * be cleared until the real writing operation is finished
|
|
+ */
|
|
+
|
|
+ if (sunxi_rtc_wait(chip, SUNXI_LOSC_CTRL,
|
|
+ SUNXI_LOSC_CTRL_RTC_HMS_ACC, 50)) {
|
|
+ dev_err(dev, "Failed to set rtc time.\n");
|
|
+ return -1;
|
|
+ }
|
|
+
|
|
+ writel(date, chip->base + SUNXI_RTC_YMD);
|
|
+
|
|
+ /*
|
|
+ * After writing the RTC YY-MM-DD register, the
|
|
+ * SUNXI_LOSC_CTRL_RTC_YMD_ACC bit is set and it will not
|
|
+ * be cleared until the real writing operation is finished
|
|
+ */
|
|
+
|
|
+ if (sunxi_rtc_wait(chip, SUNXI_LOSC_CTRL,
|
|
+ SUNXI_LOSC_CTRL_RTC_YMD_ACC, 50)) {
|
|
+ dev_err(dev, "Failed to set rtc time.\n");
|
|
+ return -1;
|
|
+ }
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static int sunxi_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
|
|
+{
|
|
+ struct sunxi_rtc_dev *chip = dev_get_drvdata(dev);
|
|
+
|
|
+ if (!enabled)
|
|
+ sunxi_rtc_setaie(enabled, chip);
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static const struct rtc_class_ops sunxi_rtc_ops = {
|
|
+ .read_time = sunxi_rtc_gettime,
|
|
+ .set_time = sunxi_rtc_settime,
|
|
+ .read_alarm = sunxi_rtc_getalarm,
|
|
+ .set_alarm = sunxi_rtc_setalarm,
|
|
+ .alarm_irq_enable = sunxi_rtc_alarm_irq_enable
|
|
+};
|
|
+
|
|
+static const struct of_device_id sunxi_rtc_dt_ids[] = {
|
|
+ { .compatible = "allwinner,sun4i-rtc", .data = &data_year_param[0] },
|
|
+ { .compatible = "allwinner,sun7i-a20-rtc", .data = &data_year_param[1] },
|
|
+ { /* sentinel */ },
|
|
+};
|
|
+MODULE_DEVICE_TABLE(of, sunxi_rtc_dt_ids);
|
|
+
|
|
+static int sunxi_rtc_probe(struct platform_device *pdev)
|
|
+{
|
|
+ struct sunxi_rtc_dev *chip;
|
|
+ struct resource *res;
|
|
+ const struct of_device_id *of_id;
|
|
+ int ret;
|
|
+
|
|
+ chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
|
|
+ if (!chip)
|
|
+ return -ENOMEM;
|
|
+
|
|
+ platform_set_drvdata(pdev, chip);
|
|
+ chip->dev = &pdev->dev;
|
|
+
|
|
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
+ chip->base = devm_ioremap_resource(&pdev->dev, res);
|
|
+ if (IS_ERR(chip->base))
|
|
+ return PTR_ERR(chip->base);
|
|
+
|
|
+ chip->irq = platform_get_irq(pdev, 0);
|
|
+ if (chip->irq < 0) {
|
|
+ dev_err(&pdev->dev, "No IRQ resource\n");
|
|
+ return chip->irq;
|
|
+ }
|
|
+ ret = devm_request_irq(&pdev->dev, chip->irq, sunxi_rtc_alarmirq,
|
|
+ 0, dev_name(&pdev->dev), chip);
|
|
+ if (ret) {
|
|
+ dev_err(&pdev->dev, "Could not request IRQ\n");
|
|
+ return ret;
|
|
+ }
|
|
+
|
|
+ of_id = of_match_device(sunxi_rtc_dt_ids, &pdev->dev);
|
|
+ if (!of_id) {
|
|
+ dev_err(&pdev->dev, "Unable to setup RTC data\n");
|
|
+ return -ENODEV;
|
|
+ }
|
|
+ chip->data_year = (struct sunxi_rtc_data_year *) of_id->data;
|
|
+
|
|
+ /* clear the alarm count value */
|
|
+ writel(0, chip->base + SUNXI_ALRM_DHMS);
|
|
+
|
|
+ /* disable alarm, not generate irq pending */
|
|
+ writel(0, chip->base + SUNXI_ALRM_EN);
|
|
+
|
|
+ /* disable alarm week/cnt irq, unset to cpu */
|
|
+ writel(0, chip->base + SUNXI_ALRM_IRQ_EN);
|
|
+
|
|
+ /* clear alarm week/cnt irq pending */
|
|
+ writel(SUNXI_ALRM_IRQ_STA_CNT_IRQ_PEND, chip->base +
|
|
+ SUNXI_ALRM_IRQ_STA);
|
|
+
|
|
+ chip->rtc = rtc_device_register("rtc-sunxi", &pdev->dev,
|
|
+ &sunxi_rtc_ops, THIS_MODULE);
|
|
+ if (IS_ERR(chip->rtc)) {
|
|
+ dev_err(&pdev->dev, "unable to register device\n");
|
|
+ return PTR_ERR(chip->rtc);
|
|
+ }
|
|
+
|
|
+ dev_info(&pdev->dev, "RTC enabled\n");
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static int sunxi_rtc_remove(struct platform_device *pdev)
|
|
+{
|
|
+ struct sunxi_rtc_dev *chip = platform_get_drvdata(pdev);
|
|
+
|
|
+ rtc_device_unregister(chip->rtc);
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static struct platform_driver sunxi_rtc_driver = {
|
|
+ .probe = sunxi_rtc_probe,
|
|
+ .remove = sunxi_rtc_remove,
|
|
+ .driver = {
|
|
+ .name = "sunxi-rtc",
|
|
+ .owner = THIS_MODULE,
|
|
+ .of_match_table = sunxi_rtc_dt_ids,
|
|
+ },
|
|
+};
|
|
+
|
|
+module_platform_driver(sunxi_rtc_driver);
|
|
+
|
|
+MODULE_DESCRIPTION("sunxi RTC driver");
|
|
+MODULE_AUTHOR("Carlo Caione <carlo.caione@gmail.com>");
|
|
+MODULE_LICENSE("GPL");
|
|
--
|
|
1.8.5.1
|
|
|