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14940aee45
Removed upstreamed: target/linux/mvebu/patches-5.4/001-PCI-aardvark-Wait-for-endpoint-to-be-ready-before-tr.patch target/linux/mvebu/patches-5.4/016-PCI-aardvark-Train-link-immediately-after-enabling-t.patch target/linux/mvebu/patches-5.4/017-PCI-aardvark-Improve-link-training.patch target/linux/mvebu/patches-5.4/018-PCI-aardvark-Issue-PERST-via-GPIO.patch target/linux/mvebu/patches-5.4/020-arm64-dts-marvell-armada-37xx-Set-pcie_reset_pin-to-.patch The following patch does not apply to upstream any more and needs some more work to make it work fully again. I am not sure if we are still able to set the UART to a none standard baud rate. target/linux/ath79/patches-5.4/921-serial-core-add-support-for-boot-console-with-arbitr.patch These patches needed manually changes: target/linux/generic/pending-5.4/110-ehci_hcd_ignore_oc.patch target/linux/ipq806x/patches-5.4/0065-arm-override-compiler-flags.patch target/linux/layerscape/patches-5.4/804-crypto-0016-MLKU-114-1-crypto-caam-reduce-page-0-regs-access-to-.patch target/linux/mvebu/patches-5.4/019-PCI-aardvark-Add-PHY-support.patch target/linux/octeontx/patches-5.4/0004-PCI-add-quirk-for-Gateworks-PLX-PEX860x-switch-with-.patch All others updated automatically. Compile-tested on: malta/le, armvirt/64, lantiq/xrx200 Runtime-tested on: malta/le, armvirt/64, lantiq/xrx200 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
20 lines
613 B
Diff
20 lines
613 B
Diff
--- a/arch/mips/kernel/mips-cm.c
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+++ b/arch/mips/kernel/mips-cm.c
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@@ -232,6 +232,7 @@ int mips_cm_probe(void)
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/* disable CM regions */
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write_gcr_reg0_base(CM_GCR_REGn_BASE_BASEADDR);
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+ /*
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write_gcr_reg0_mask(CM_GCR_REGn_MASK_ADDRMASK);
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write_gcr_reg1_base(CM_GCR_REGn_BASE_BASEADDR);
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write_gcr_reg1_mask(CM_GCR_REGn_MASK_ADDRMASK);
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@@ -239,7 +240,7 @@ int mips_cm_probe(void)
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write_gcr_reg2_mask(CM_GCR_REGn_MASK_ADDRMASK);
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write_gcr_reg3_base(CM_GCR_REGn_BASE_BASEADDR);
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write_gcr_reg3_mask(CM_GCR_REGn_MASK_ADDRMASK);
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-
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+*/
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/* probe for an L2-only sync region */
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mips_cm_probe_l2sync();
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