mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-20 06:08:08 +00:00
1343acc8cd
Deleted (upstreamed): bcm27xx/patches-5.10/950-0669-drm-vc4-hdmi-Make-sure-the-device-is-powered-with-CE.patch [1] bcm27xx/patches-5.10/950-0672-drm-vc4-hdmi-Move-initial-register-read-after-pm_run.patch [1] gemini/patches-5.10/0003-ARM-dts-gemini-NAS4220-B-fis-index-block-with-128-Ki.patch [2] Manually rebased: bcm27xx/patches-5.10/950-0675-drm-vc4-hdmi-Drop-devm-interrupt-handler-for-CEC-int.patch Manually reverted: generic/pending-5.10/860-Revert-ASoC-mediatek-Check-for-error-clk-pointer.patch [3] [1] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.10.94&id=55b10b88ac8654fc2f31518aa349a2e643b37f18 [2] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.10.94&id=958a8819d41420d7a74ed922a09cacc0ba3a4218 [3] https://lore.kernel.org/all/trinity-2a727d96-0335-4d03-8f30-e22a0e10112d-1643363480085@3c-app-gmx-bap33/ Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com> Signed-off-by: Daniel Golle <daniel@makrotopia.org>
59 lines
1.6 KiB
Diff
59 lines
1.6 KiB
Diff
From dcfed6cdcd38f9b0ca706af74710969aa8082c38 Mon Sep 17 00:00:00 2001
|
|
From: popcornmix <popcornmix@gmail.com>
|
|
Date: Tue, 3 Sep 2019 20:28:00 +0100
|
|
Subject: [PATCH] clk-bcm2835: Disable v3d clock
|
|
|
|
This is controlled by firmware, see clk-raspberrypi.c
|
|
|
|
Signed-off-by: popcornmix <popcornmix@gmail.com>
|
|
---
|
|
drivers/clk/bcm/clk-bcm2835.c | 30 ++++++++++++------------------
|
|
1 file changed, 12 insertions(+), 18 deletions(-)
|
|
|
|
--- a/drivers/clk/bcm/clk-bcm2835.c
|
|
+++ b/drivers/clk/bcm/clk-bcm2835.c
|
|
@@ -1736,16 +1736,12 @@ static const struct bcm2835_clk_desc clk
|
|
.hold_mask = CM_PLLA_HOLDCORE,
|
|
.fixed_divider = 1,
|
|
.flags = CLK_SET_RATE_PARENT),
|
|
- [BCM2835_PLLA_PER] = REGISTER_PLL_DIV(
|
|
- SOC_ALL,
|
|
- .name = "plla_per",
|
|
- .source_pll = "plla",
|
|
- .cm_reg = CM_PLLA,
|
|
- .a2w_reg = A2W_PLLA_PER,
|
|
- .load_mask = CM_PLLA_LOADPER,
|
|
- .hold_mask = CM_PLLA_HOLDPER,
|
|
- .fixed_divider = 1,
|
|
- .flags = CLK_SET_RATE_PARENT),
|
|
+
|
|
+ /*
|
|
+ * PLLA_PER is used for gpu clocks. Controlled by firmware, see
|
|
+ * clk-raspberrypi.c.
|
|
+ */
|
|
+
|
|
[BCM2835_PLLA_DSI0] = REGISTER_PLL_DIV(
|
|
SOC_ALL,
|
|
.name = "plla_dsi0",
|
|
@@ -2046,14 +2042,12 @@ static const struct bcm2835_clk_desc clk
|
|
.int_bits = 6,
|
|
.frac_bits = 0,
|
|
.tcnt_mux = 3),
|
|
- [BCM2835_CLOCK_V3D] = REGISTER_VPU_CLK(
|
|
- SOC_ALL,
|
|
- .name = "v3d",
|
|
- .ctl_reg = CM_V3DCTL,
|
|
- .div_reg = CM_V3DDIV,
|
|
- .int_bits = 4,
|
|
- .frac_bits = 8,
|
|
- .tcnt_mux = 4),
|
|
+
|
|
+ /*
|
|
+ * CLOCK_V3D is used for v3d clock. Controlled by firmware, see
|
|
+ * clk-raspberrypi.c.
|
|
+ */
|
|
+
|
|
/*
|
|
* VPU clock. This doesn't have an enable bit, since it drives
|
|
* the bus for everything else, and is special so it doesn't need
|