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4e09722a68
Hardware -------- RockChip RK3568 ARM64 (4 cores) 1GB or 4GB LPDDR4X RAM 2x 2500 Base-T 4 LEDs (LAN / WAN / WIFI / POWER) 1 Button (Reset) 8GB or 32GB eMMC on-board Micro-SD Slot M.2 Slot 2x USB 3.0 Port Installation ------------ Uncompress the OpenWrt sysupgrade and write it to a micro SD card or internal eMMC using dd. Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
153 lines
3.9 KiB
Diff
153 lines
3.9 KiB
Diff
From 05620031408ac6cfc6d5c048431827e49aa0ade1 Mon Sep 17 00:00:00 2001
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From: Tianling Shen <cnsztl@gmail.com>
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Date: Sat, 18 Mar 2023 16:37:43 +0800
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Subject: [PATCH] arm64: dts: rockchip: Add FriendlyARM NanoPi R5C
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FriendlyARM NanoPi R5C is an open-sourced mini IoT gateway device.
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Specification:
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- Rockchip RK3568
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- 1/4GB LPDDR4X RAM
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- 8/32GB eMMC
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- SD card slot
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- M.2 Connector
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- 2x USB 3.0 Port
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- 2x 2500 Base-T (PCIe, r8125)
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- HDMI 2.0
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- MIPI DSI/CSI
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- USB Type C 5V
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Signed-off-by: Tianling Shen <cnsztl@gmail.com>
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Link: https://lore.kernel.org/r/20230318083745.6181-4-cnsztl@gmail.com
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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---
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arch/arm64/boot/dts/rockchip/Makefile | 1 +
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.../boot/dts/rockchip/rk3568-nanopi-r5c.dts | 112 ++++++++++++++++++
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2 files changed, 113 insertions(+)
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create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5c.dts
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--- a/arch/arm64/boot/dts/rockchip/Makefile
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+++ b/arch/arm64/boot/dts/rockchip/Makefile
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@@ -74,5 +74,6 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-ro
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-soquartz-cm4.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-bpi-r2-pro.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb
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+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5c.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5s.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb
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--- /dev/null
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+++ b/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5c.dts
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@@ -0,0 +1,112 @@
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+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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+/*
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+ * Copyright (c) 2022 FriendlyElec Computer Tech. Co., Ltd.
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+ * (http://www.friendlyelec.com)
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+ *
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+ * Copyright (c) 2023 Tianling Shen <cnsztl@gmail.com>
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+ */
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+
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+/dts-v1/;
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+#include "rk3568-nanopi-r5s.dtsi"
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+
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+/ {
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+ model = "FriendlyElec NanoPi R5C";
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+ compatible = "friendlyarm,nanopi-r5c", "rockchip,rk3568";
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+
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+ gpio-keys {
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+ compatible = "gpio-keys";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&reset_button_pin>;
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+
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+ button-reset {
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+ debounce-interval = <50>;
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+ gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>;
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+ label = "reset";
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+ linux,code = <KEY_RESTART>;
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+ };
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+ };
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+
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+ gpio-leds {
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+ compatible = "gpio-leds";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&lan_led_pin>, <&power_led_pin>, <&wan_led_pin>, <&wlan_led_pin>;
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+
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+ led-lan {
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+ color = <LED_COLOR_ID_GREEN>;
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+ function = LED_FUNCTION_LAN;
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+ gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>;
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+ };
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+
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+ power_led: led-power {
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+ color = <LED_COLOR_ID_RED>;
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+ function = LED_FUNCTION_POWER;
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+ linux,default-trigger = "heartbeat";
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+ gpios = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>;
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+ };
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+
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+ led-wan {
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+ color = <LED_COLOR_ID_GREEN>;
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+ function = LED_FUNCTION_WAN;
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+ gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>;
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+ };
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+
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+ led-wlan {
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+ color = <LED_COLOR_ID_GREEN>;
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+ function = LED_FUNCTION_WLAN;
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+ gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>;
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+ };
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+ };
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+};
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+
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+&pcie2x1 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pcie20_reset_pin>;
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+ reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
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+ status = "okay";
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+};
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+
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+&pcie3x1 {
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+ num-lanes = <1>;
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+ reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
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+ vpcie3v3-supply = <&vcc3v3_pcie>;
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+ status = "okay";
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+};
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+
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+&pcie3x2 {
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+ num-lanes = <1>;
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+ reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
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+ vpcie3v3-supply = <&vcc3v3_pcie>;
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+ status = "okay";
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+};
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+
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+&pinctrl {
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+ gpio-leds {
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+ lan_led_pin: lan-led-pin {
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+ rockchip,pins = <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+
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+ power_led_pin: power-led-pin {
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+ rockchip,pins = <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+
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+ wan_led_pin: wan-led-pin {
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+ rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+
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+ wlan_led_pin: wlan-led-pin {
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+ rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+ };
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+
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+ pcie {
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+ pcie20_reset_pin: pcie20-reset-pin {
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+ rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>;
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+ };
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+ };
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+
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+ rockchip-key {
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+ reset_button_pin: reset-button-pin {
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+ rockchip,pins = <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
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+ };
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+ };
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+};
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