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https://github.com/openwrt/openwrt.git
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f07e572f64
bcm2708: boot tested on RPi B+ v1.2 bcm2709: boot tested on RPi 3B v1.2 and RPi 4B v1.1 4G bcm2710: boot tested on RPi 3B v1.2 bcm2711: boot tested on RPi 4B v1.1 4G Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
96 lines
3.6 KiB
Diff
96 lines
3.6 KiB
Diff
From 09648b92a71b03450e9482f0cc5bd22298f78d44 Mon Sep 17 00:00:00 2001
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From: Jonathan Bell <jonathan@raspberrypi.org>
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Date: Wed, 8 Jan 2020 12:48:09 +0000
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Subject: [PATCH] dwc_otg: fiq_fsm: pause when cancelling split
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transactions
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Non-periodic splits will DMA to/from the driver-provided transfer_buffer,
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which may be freed immediately after the dequeue call returns. Block until
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we know the transfer is complete.
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A similar delay is needed when cleaning up disconnects, as the FIQ could
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have started a periodic transfer in the previous microframe to the one
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that triggered a disconnect.
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Signed-off-by: Jonathan Bell <jonathan@raspberrypi.org>
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---
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drivers/usb/host/dwc_otg/dwc_otg_hcd.c | 33 +++++++++++++++++++++--
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drivers/usb/host/dwc_otg/dwc_otg_os_dep.h | 1 +
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2 files changed, 32 insertions(+), 2 deletions(-)
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--- a/drivers/usb/host/dwc_otg/dwc_otg_hcd.c
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+++ b/drivers/usb/host/dwc_otg/dwc_otg_hcd.c
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@@ -175,6 +175,7 @@ static void kill_urbs_in_qh_list(dwc_otg
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dwc_list_link_t *qh_item, *qh_tmp;
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dwc_otg_qh_t *qh;
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dwc_otg_qtd_t *qtd, *qtd_tmp;
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+ int quiesced = 0;
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DWC_LIST_FOREACH_SAFE(qh_item, qh_tmp, qh_list) {
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qh = DWC_LIST_ENTRY(qh_item, dwc_otg_qh_t, qh_list_entry);
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@@ -198,8 +199,17 @@ static void kill_urbs_in_qh_list(dwc_otg
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qh->channel->halt_status = DWC_OTG_HC_XFER_URB_DEQUEUE;
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qh->channel->halt_pending = 1;
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if (hcd->fiq_state->channel[n].fsm == FIQ_HS_ISOC_TURBO ||
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- hcd->fiq_state->channel[n].fsm == FIQ_HS_ISOC_SLEEPING)
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+ hcd->fiq_state->channel[n].fsm == FIQ_HS_ISOC_SLEEPING)
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hcd->fiq_state->channel[n].fsm = FIQ_HS_ISOC_ABORTED;
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+ /* We're called from disconnect callback or in the middle of freeing the HCD here,
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+ * so FIQ is disabled, top-level interrupts masked and we're holding the spinlock.
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+ * No further URBs will be submitted, but wait 1 microframe for any previously
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+ * submitted periodic DMA to finish.
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+ */
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+ if (!quiesced) {
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+ udelay(125);
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+ quiesced = 1;
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+ }
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} else {
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dwc_otg_hc_halt(hcd->core_if, qh->channel,
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DWC_OTG_HC_XFER_URB_DEQUEUE);
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@@ -600,15 +610,34 @@ int dwc_otg_hcd_urb_dequeue(dwc_otg_hcd_
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/* In FIQ FSM mode, we need to shut down carefully.
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* The FIQ may attempt to restart a disabled channel */
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if (fiq_fsm_enable && (hcd->fiq_state->channel[n].fsm != FIQ_PASSTHROUGH)) {
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+ int retries = 3;
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+ int running = 0;
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+ enum fiq_fsm_state state;
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+
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local_fiq_disable();
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fiq_fsm_spin_lock(&hcd->fiq_state->lock);
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qh->channel->halt_status = DWC_OTG_HC_XFER_URB_DEQUEUE;
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qh->channel->halt_pending = 1;
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if (hcd->fiq_state->channel[n].fsm == FIQ_HS_ISOC_TURBO ||
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- hcd->fiq_state->channel[n].fsm == FIQ_HS_ISOC_SLEEPING)
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+ hcd->fiq_state->channel[n].fsm == FIQ_HS_ISOC_SLEEPING)
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hcd->fiq_state->channel[n].fsm = FIQ_HS_ISOC_ABORTED;
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fiq_fsm_spin_unlock(&hcd->fiq_state->lock);
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local_fiq_enable();
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+
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+ if (dwc_qh_is_non_per(qh)) {
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+ do {
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+ state = READ_ONCE(hcd->fiq_state->channel[n].fsm);
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+ running = (state != FIQ_NP_SPLIT_DONE) &&
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+ (state != FIQ_NP_SPLIT_LS_ABORTED) &&
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+ (state != FIQ_NP_SPLIT_HS_ABORTED);
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+ if (!running)
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+ break;
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+ udelay(125);
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+ } while(--retries);
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+ if (!retries)
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+ DWC_WARN("Timed out waiting for FSM NP transfer to complete on %d",
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+ qh->channel->hc_num);
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+ }
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} else {
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dwc_otg_hc_halt(hcd->core_if, qh->channel,
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DWC_OTG_HC_XFER_URB_DEQUEUE);
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--- a/drivers/usb/host/dwc_otg/dwc_otg_os_dep.h
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+++ b/drivers/usb/host/dwc_otg/dwc_otg_os_dep.h
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@@ -27,6 +27,7 @@
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#include <linux/workqueue.h>
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#include <linux/stat.h>
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#include <linux/pci.h>
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+#include <linux/compiler.h>
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#include <linux/version.h>
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